System and method for enabling efficient processing of a program that includes assertion instructions
OwnerLawrence D.K.B. Dwyer, Carol L. Thompsoninventors
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OwnerLawrence D.K.B. Dwyer, Carol L. Thompsoninventors
Estimating the term…
The present invention relates to a system and method for reducing the adverse impact of assertion instructions to processor performance so that programmers will be encouraged to include assertion instructions in computer programs. The system of the present invention includes memory and a compiler. The memory stores a first program to be compiled by the compiler. The compiler, in compiling the first program, translates a first function of the first program into a second function of a second program. The first function has assertion instructions that are translated by the compiler into translated assertion instructions, which are included in the second function. In compiling the first program, the compiler enables selective execution, based on a run time input, of a portion of the translated assertion instructions included in the second function.
A system for enabling selective assertion testing of computer programs based on run time inputs, comprising:
A system for enabling selective assertion testing of computer programs based on run time inputs, comprising:
A method for enabling selective assertion testing of computer programs based on run time inputs, comprising the steps of:
A method for enabling selective assertion testing of computer programs based on run time inputs, comprising the steps of:
Dependencies are inferred from the claim text.