Apparatus with a test interface

An integrated circuit comprising

• a boundary scan unit, comprising a clock input for receiving a clock signal, a shift register and a test state machine capable of assuming respective test states successively in successive cycles of the clock signal, the test state machine having outputs that control transport of test data through the shift register and between the shift register and a circuit under test, dependent on which of the test states the test state machine has assumed;
• connection pins suitable for connecting a non-volatile memory;
• a co-processor state machine, capable of assuming respective co-processor states, the co-processor state machine starting to make transitions from a start state, when enabled, in response to assumption of a predetermined one of the test states by the test state machine, the co-processor states assumed by the co-processor state machine following the start state supplying of successive control signals for programming data transported from the scan chain under control of the test state machine to the connection pins for programming the non-volatile memory in successive cycles of the clock signal following the predetermined state.

A method of programming a non-volatile memory, the method comprising

• entering information items that have to be programmed into the non-volatile memory into a boundary scan chain;
• using a standard test state machine to control transport of the information items through the boundary scan chain and output of the information items from a parallel output of the boundary scan chain, the information items being output successively, each following a respective assumption of a same predetermined state by the test machine;
• using a co-processor state machine to control programming of the information, the co-processor state machine being started from a start state repeatedly, each time by guiding the test state machine through the predetermined state, the co-processor state machine running in step with the test state machine from said predetermined state, states following the start state being arranged to make the non-volatile memory program the information item output from the boundary scan chain following the predetermined step.