Method and arrangement for detecting and correcting line defects
OwnerPavel Peleskainventor
Life of this patent
Estimating the term…
Abstract
A detection and correction method for detecting and correcting line defects, as well as a circuit arrangement, are provided to execute a checking routine on every single line, whereby all errors are reliably detected. By virtue of the detection, only one additional fallback line need be provided for each single line error to be corrected, to which fallback line a switchover is made in the event of an error.
Claims12
A method for detecting faults in connections which connect a first module and a second module, following an event initiating the detection method, determining one of the modules as initiator and one of the modules as responder, comprising:
- sending the initiator, in a first step, a first value and sending a second value, in a second step, to the responder over a connection, wherein a first sequence and the first and second value are known to the responder as a first expected sequence;
- checking, via the responder, whether the values received in the first and second step match the first expected sequence;
- if the check by the responder is successful, in a third step, sending, via the responder, a third value and, in a fourth step, sending a fourth value to the initiator over the connection, wherein a second sequence and the third and fourth value are known to the initiator as a second expected sequence;
- if the check by the responder is a negative outcome, in the third step, sending, via the responder, the fourth value and, in the fourth step, sending the third value to the initiator over the connection and marking the connection as faulty;
- checking, via the initiator, whether the values received in the third and fourth step match the second expected sequence;
- if the check by the initiator is successful, sending, in a fifth step, via the initiator, a fifth value and, in a sixth step, sending a sixth value to the responder over the connection, wherein a third sequence and the fifth and sixth value are known to the responder as a third expected sequence;
- if the check by the initiator is a negative outcome, sending, in the fifth step, via the initiator, the sixth value and, in the sixth step, sending the fifth value to the responder over the connection and marking the connection as faulty;
- checking, via the responder, whether the values received in the fifth and sixth step match the third expected sequence, and marking the connection as faulty if the check has a negative outcome.
A method for correcting faults in connections between digital modules, comprising:
- forming a connection by a first group of active connection lines and providing a second group of inactive connection lines accordingly;
- and
- activating an inactive connection line of the second group and deactivating a connection line that has been active up until this point if the active connection line is found to be faulty by the control logic device, wherein the control logic device in cooperation with a multiplexing device controls activation and deactivation.
A circuit arrangement for correcting faults on connections between digital modules, comprising:
- a control logic device to detect arrangement-internal and arrangement-external faults of input/output connections and a multiplexer device to switch over data transmission of faulty active input/output connections to fault-free inactive input/output connections.
Dependencies are inferred from the claim text.