Enhanced boolean processor

A processing method, comprising:

• starting an operation related to a Normal Form Boolean expression, wherein the Boolean expression comprises a conjunct or a disjunct;
• evaluating the conjunct or disjunct;
• and
• selectively short-circuiting a portion of the Boolean expression.

A computing device, comprising:

• a general-purpose processor;
• and
• a Boolean co-processor that accepts code, representative of Boolean code, from the general-purpose processor, the Boolean processor including:
• a Boolean logic unit, wherein the Boolean logic unit is operable for performing the short-circuit evaluation of Conjunctive Normal Form Boolean expressions/operations, operable for performing the short-circuit evaluation of Disjunctive Normal Form Boolean expressions/operations, or operable for performing the short-circuit evaluation of both Conjunctive Normal Form Boolean expressions/operations and Disjunctive Normal Form Boolean expressions/operations;
• a plurality of input/output interfaces, wherein the plurality of input/output interfaces are operable for receiving a plurality of compiled Boolean expressions/operations and transmitting a plurality of compiled results;
• and
• a plurality of registers.

A hybrid processor, comprising:

• a host processor, wherein the host processor is at least operable for performing comparison operations and register modifications;
• and
• a Boolean processor core, comprising:
• a Boolean short-circuit outcome calculation unit, wherein the Boolean short-circuit outcome calculation unit is operable for evaluating the short-circuit outcome of Conjunctive Normal Form Boolean expressions/operations, operable for evaluating the short-circuit outcome of Disjunctive Normal Form Boolean expressions/operations, or operable for evaluating the short-circuit outcome of both Conjunctive Normal Form Boolean expressions/operations and Disjunctive Normal Form Boolean expressions/operations;
• a plurality of input/output interfaces, wherein the plurality of input/output interfaces are operable for receiving, from the host processor, data related to a plurality of compiled Boolean expressions/operations and transmitting, to the host processor, data representative of the short-circuit outcome of a plurality of evaluated Normal Form Boolean expressions/operations;
• and
• a plurality of registers.

A compiling method, comprising:

• receiving a plurality of conditional tests;
• based upon the received plurality of conditional tests, generating an operation, in computer-readable format, representative of a Boolean expression in Conjunctive Normal Form or Disjunctive Normal Form;
• and
• storing the operation in a Boolean processor operable to evaluate the Boolean expression by processing the operation and to selectively short-circuit a portion of the Boolean expression.