Method for optimizing high frequency performance of via structures
AssigneeSanmina-SCI Corporation
InventorsFranz Gisin, William Panos, Mahamud Khandokar
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AssigneeSanmina-SCI Corporation
InventorsFranz Gisin, William Panos, Mahamud Khandokar
Estimating the term…
A method for enhancing the high frequency signal integrity performance of a printed circuit board (PCB) or backplane is provided. The method may involve the use of the S-parameters as the primary cost factors associated with an iterative process to optimize the physical dimensions and shape of a single or a collection of vias within the PCB or backplane. Such process involves the representation of the via components as equivalent lumped series admittances and impedances, as well as, RLGC sub-circuits upon which basic circuit analysis may be performed to optimize secondary characteristics, for example, the maximization of the sub-circuit's resistance and/or the minimization of the subcircuit's capacitance. The iterative process involves the alteration of physical dimensions and the shape of the via components such that the secondary characteristics are optimized.
A method for optimizing the high frequency performance of at least one via structure, comprising the steps of:
A method of optimizing the high frequency performance of at least one via structure, comprising the steps of:
A method of optimizing the high frequency performance of at least one via structure, comprising the steps of:
Dependencies are inferred from the claim text.