Semiconductor device and method for fabricating the same

A semiconductor device comprising a MOS transistor with a plurality of gate electrodes,

• wherein each of the gate electrodes is arranged between the other gate electrodes or between one of the gate electrodes and a dummy pattern with a space left at each side thereof,
• a first silicide layer is formed in the upper portion of the gate electrode,
• a second silicide layer is formed in a region between the gate electrode and at least one of another gate electrode and the dummy pattern, and
• the first silicide layer has a greater thickness than the second silicide layer.

A semiconductor device comprising a MOS transistor with a plurality of gate electrodes,

• wherein the gate electrodes are formed on a semiconductor substrate having a silicon layer at least in the surface thereof,
• the MOS transistor has a gate length of 0.15 μm or smaller and is formed in an element region surrounded with an isolation insulating film,
• each of the gate electrodes is arranged between the other gate electrodes or between one of the other electrodes and a dummy pattern with a space left from each side thereof,
• sidewalls are provided on side walls of each of the gate electrodes and on side walls of another said gate electrode,
• a first silicide layer is formed in the upper portion of the gate electrode,
• a second silicide layer is formed in a portion of the semiconductor substrate surface which is located in part of the element region between the gate electrode and at least one of another gate electrode and the dummy pattern, and
• the first silicide layer has a greater thickness than the second silicide layer.

A method for fabricating a semiconductor device, comprising the steps of:

• forming a gate insulating film on a semiconductor substrate having a silicon layer at least in the surface thereof, and depositing an amorphous silicon film or a polysilicon film on the gate insulating film;
• patterning the amorphous silicon film or the polysilicon film to form a gate electrode and at least one of another gate electrode and a dummy gate electrode, at least one said electrode being spaced away from both sides of the gate electrode;
• doping impurities into the semiconductor substrate to form doped layers serving as a source and a drain;
• and
• depositing a metal film on the semiconductor substrate, the gate electrode, and another said gate electrode or the dummy gate electrode, and performing heat treatment on the metal film, thereby forming silicide on the semiconductor substrate, the gate electrode, and at least one electrode of another said gate electrode and the dummy gate electrode.

A method for fabricating a semiconductor device, comprising the steps of:

• forming a gate insulating film on a semiconductor substrate having a silicon layer at least in the surface thereof, and depositing an amorphous silicon film or a polysilicon film on the gate insulating film;
• patterning the amorphous silicon film or the polysilicon film to form a plurality of aligned gate electrodes in array form;
• doping impurities into the semiconductor substrate to form doped layers serving as a source and a drain;
• depositing an insulating layer on the semiconductor substrate;
• patterning the insulating layer to form dummy patterns disposed away from both sides of the electrode array in the alignment direction thereof, respectively;
• and
• depositing a metal film on the semiconductor substrate, the gate electrode, and the dummy patterns, and performing heat treatment on the metal film, thereby forming silicide on the semiconductor substrate and the gate electrode.

A method for fabricating a semiconductor device, comprising the steps of:

• forming an isolation insulating film on a semiconductor substrate having a silicon layer at least in the surface thereof, to form an element region surrounded with the isolation insulating film;
• forming a gate insulating film on the semiconductor substrate, and depositing an amorphous silicon film or a polysilicon film on the gate insulating film;
• patterning the amorphous silicon film or the polysilicon film to form a gate electrode on the element region and form a dummy gate electrode disposed on the isolation insulating film and adjacent to the gate electrode;
• doping impurities into the semiconductor substrate to form doped layers serving as a source and a drain;
• depositing an insulating layer on the semiconductor substrate;
• patterning the insulating layer to form a dummy pattern disposed on the isolation insulating film and adjacent to the gate electrode;
• and
• depositing a metal film on the semiconductor substrate, the gate electrode, the dummy gate electrode, and the dummy pattern, and performing heat treatment on the metal film, thereby forming silicide on the semiconductor substrate, the gate electrode, and the dummy gate electrode.