Method to form a cross network of air gaps within IMD layer

A method of forming air gaps between metal leads of a semiconductor device, comprising the steps of:

• providing a semiconductor substrate whereby the surface of said semiconductor substrate has been provided with points of electrical contact;
• forming a first network of trenches in a first level of dielectric said first level of dielectric having been deposited on the surface of said substrate whereby said first network of trenches is filled with a disposable solid layer;
• forming a second network of trenches in a second level of dielectric said second level of dielectric having been deposited on the surface of said first level of dielectric whereby said second network of trenches is in physical contact with and intersects with said first network of nitride filled trenches whereby furthermore said second network of trenches is filled with a disposable solid layer;
• depositing a first thin layer of oxide over the surface of said second layer of dielectric;
• etching openings in said first thin layer of oxide said openings to align with said intersects between said first network of trenches and said second network of trenches;
• removing said disposable solid layer from said second network of trenches furthermore removing said disposable solid layer from said first network of trenches;
• and
• depositing a second thin layer of oxide over the surface of said first thin layer of oxide thereby closing said openings in said first thin layer of oxide.

A method of forming air gaps between metal leads of a semiconductor device, comprising the steps of:

• providing a semiconductor substrate;
• depositing a layer of metal on the surface of said substrate;
• etching said metal layer in a pattern to form metal leads, said metal leads running in a Y-direction said metal leads furthermore having top surfaces;
• depositing a first layer of dielectric over the surface of said substrate thereby including said metal leads;
• creating trenches in said first level of dielectric said trenches running in a X-direction;
• filling said trenches in said first layer of dielectric with a first layer of nitride or another disposable solid;
• depositing a second layer of dielectric over the surface of said first layer of dielectric thereby including said first layer of nitride or another disposable solid;
• creating trenches in said second level of dielectric said trenches running in a Y-direction said trenches furthermore having intersects with said trenches created in said first layer of dielectric;
• filling said trenches in said second layer of dielectric with a second layer of nitride or another disposable solid;
• depositing a first thin layer of oxide over the surface of said second layer of dielectric thereby including the surface of said second layer of nitride or other disposable solid;
• etching openings in said first thin layer of oxide said openings to align with said intersects between said trenches created in said first level of dielectric and said trenches created in said second layer of dielectric;
• removing said second layer of nitride or other disposable solid from said trenches created in said second layer of dielectric furthermore removing said first layer of nitride or other disposable solid from said trenches created in said first layer of dielectric thereby creating a network of trenches in said first layer of dielectric and in said second layer of dielectric whereby said trenches in said first layer of dielectric intersect said trenches in said second layer of dielectric under an angle of about 90 degrees;
• and
• depositing a second thin layer of oxide over the surface of said first thin layer of oxide thereby closing off said openings in said first thin layer of oxide.

A multilevel interconnect structure, comprising:

• a semiconductor surface that has been provided with points of electrical contact in the surface of said surface;
• a first layer of dielectric deposited on said semiconductor surface said first layer of dielectric containing a first network of trenches filled with air;
• a second layer of dielectric deposited on said semiconductor surface said second layer of dielectric containing a second network of trenches filled with air whereby said second network of trenches is in physical contact with and intersects with said first network of trenches under an angle of known value;
• and
• a layer of oxide deposited over the surface of said second layer of dielectric.