Method for forming a metal silicide layer in a semiconductor device

A method for forming a metal silicide layer in a semiconductor device comprising:

• forming a first gate structure including a first gate electrode and a first spacer on a first region of a substrate;
• forming a second gate structure including a second gate electrode and a second spacer on a second region of the substrate;
• partially removing the second spacer to partially expose upper side portions of the second gate electrode;
• removing partially and simultaneously the first and second spacers;
• and
• forming a metal silicide layer on the first and second gate electrodes,
• wherein a second thickness of the metal silicide layer formed on the second gate electrode is greater than a first thickness of the metal silicide layer formed on the first gate electrode.

A method for forming a metal silicide layer in a semiconductor device comprising:

• forming a first gate structure including a first gate electrode and a first spacer on a first region of a substrate;
• forming a second gate structure including a second gate electrode and a second spacer on a second region of the substrate;
• removing partially and simultaneously the first and second spacers to expose upper side portions of the first and second gate electrodes;
• removing an exposed upper portion of the first gate electrode;
• removing partially and simultaneously the first and second spacers;
• and
• forming a metal silicide layer on the first and second gate electrodes,
• wherein a second thickness of the metal silicide layer formed on the second gate electrode is greater than a first thickness of the metal silicide layer formed on the first gate electrode.