Method of fabricating on-chip spacers for a TFT panel

9 The method as claimed in claim 1, wherein a process of fabricating the TFT panel comprises steps of:

• (a) preparing a temporary substrate adapted to form semiconductors with good electric characteristics;
• (b) forming an etching stop layer on the temporary substrate;
• (c) forming thin film transistors (TFTs) on the etching stop layer;
• (d) forming pixel electrodes on the etching stop layer adjacent to the TFTs;
• (e) forming a first metal layer on the gate oxide layer;
• (f) covering the first metal layer, ate oxide layer and pixel electrodes with an inner layer;
• (g) forming a second metal layer through the inner layer to connect to the pixel electrode to the TFT and to connect adjacent TFTs.
• (h) covering the second metal and inner layer with a passivation layer;
• (i) bonding a display panel on the passivation layer;
• and
• (j) removing the temporary substrate and portions of the etching stop layer to expose the pixel electrode.

A method of fabricating on-chip spacers for a TFT panel comprising a substrate having a top and bottom face and a TFT driving circuit with a top face formed on the top face of the substrate, windows and an opaque grid composed of portions of the TFT driving circuit;

• wherein the method comprises:
• (a) applying a photoresist layer on the top face of the TFT driving circuit;
• (b) preparing a mask having a pattern that overlaps the opaque grid and positioning the mask above the photoresist;
• (c) exposing the photoresist through the mask positioned above the photoresist with a first light to form exposed photoresist in the photoresist corresponding to the pattern;
• (d) exposing the photoresist corresponding to the windows with a second light through the bottom face of the substrate;
• and
• (e) removing the exposed photoresist to form on-chip spacers, where unexposed photoresist on the TFT driving circuit exists only in the opaque grid..

19 The method as claimed in claim 11, wherein a process of fabricating the TFT panel comprises steps of:

• (a) preparing a temporary substrate adapted to form semiconductors with good electric characteristics;
• (b) forming an etching stop layer on the temporary substrate;
• (c) forming thin film transistors (TFTs) on the etching stop layer;
• (d) forming pixel electrodes on the etching stop layer adjacent to the TFTs;
• (e) forming a first metal layer on the gate oxide layer;
• (f) covering the first metal layer, ate oxide layer and pixel electrodes with an inner layer;
• (g) forming a second metal layer through the inner layer to connect to the pixel electrode to the TFT and to connect adjacent TFTs.
• (h) covering the second metal and inner layer with a passivation layer;
• (i) bonding a display panel on the passivation layer;
• and
• (j) removing the temporary substrate and portions of the etching stop layer to expose the pixel electrode.