Wafer level system for producing burn-in/screen, and reliability evaluations to be performed on all chips simultaneously without any wafer contacting

A method as claimed in Clam 18, wherein electrical wires extend from each said mask to a panel for the direct measurements and verification of the direct voltages present on each of said wafer.

A system for electrically stressing through a specified voltage at least one semiconductor chip on a wafer for controlled contactless burn-in, voltage screen and reliability evaluation of product wafers, said system comprising:

• an arrangement for applying said voltage to said at least one chip for the probing thereof in the absence of physically contacting the chip surface;
• and
• magnetically inducing said voltage to said at least one chip through the interposition of a mask onto which the voltage is induced and thereafter conducted to electrical contacts on said wafer.

A system as claimed in Clam 43, wherein electrical wires extend from each said mask to a panel for the direct measurements and verification of the direct voltages present on each of said wafer.