US 2004/0174912 A1 · Multiplexing video decoding apparatus and method

Abstract

A multiplexing video decoding apparatus for decoding video signals of a plurality of channels and a method therefor are provided. The multiplexing video decoding method receives bit streams, each of which has a plurality of slices, in a plurality of channels and decodes bit streams of the plurality of channels in a multiplexed mode. The multiplexing video decoding method includes sequentially decoding video signals of the bit stream on a slice interval basis in one channel in the plurality of channels, and when the slice has been decoded, switching to decode a slice for each of the other channels; and decoding in a multiplexed mode bit streams of a plurality of channels by repeating the above steps to the following slice of each of the channels. The apparatus includes a plurality of FIFO memories for receiving and processing the multiple bit streams in parallel, a processor for sequentially decoding the bit streams from the FIFO memories, and a video processor to reproduce a video signal.

Claims13

Dependent claims

A multiplexing video decoding method for receiving bit streams, each of said bit streams comprising a plurality of slices and received in a plurality of channels, and decoding the bit stream of each of the plurality of channels in a multiplexed mode, the multiplexing video decoding method comprising the steps of:

decoding video signals, wherein the decoding includes decoding a predetermined unit of a bit stream of one channel from the plurality of channels;
sequentially switching to decode a predetermined unit of a bit stream for each of the other plurality of channels, by obtaining a program state corresponding to a program counter value associated with a respective one of the plurality of channels;
and
decoding in a multiplexed mode bit streams of the plurality of channels by repeating the above steps for a next slice in each of the plurality of channels.

1 more element

A multiplexing video decoding apparatus for receiving bit streams, each of said bit streams comprising a plurality of slices and received in a plurality of channels, and for decoding the bit stream of each of the plurality of channels, the multiplexing video decoding apparatus comprising:

a plurality of First-In First-Out (FIFO) units for transmitting in a first-in-first-out manner the bit streams of the plurality of channels in parallel;
a syntax processor for cyclically decoding the bit streams of the plurality of channels output from the plurality of FIFO units at a slice interval;
and
a video processor for reproducing the bit stream of a corresponding channel decoded by the syntax processor into video data according to a predetermined video reproduction format, wherein the syntax processor comprises:
a plurality of stacks, each of said plurality of stacks respectively storing a program counter value of a channel to be decoded;
an index register for generating an index value for selecting a channel to be decoded from the plurality of stacks;
and
a processor for selecting a channel to be decoded by slice by cyclically incrementing the index value of the index register and to obtain a program state corresponding the program counter value that has been pushed into the respective one of the plurality of stacks for the channel.

5 more elements

Dependencies are inferred from the claim text.

Multiplexing video decoding apparatus and method

Life of this patent

Multiplexing video decoding apparatus and method

Life of this patent

Abstract

Claims13