Network switch chip and method for cascading the same

Abstract

A network switch chip and a method for controlling the same are proposed. A first network switch chip is cascaded with a second network switch chip. Each of the network switch chip comprises a high-speed network port and a plurality of connection ports. The two network switch chips are connected through the two high-speed network ports to form a direct link therebetween, and the network switch provides a transmission rate equal to the sum of transmission rates of the first connection ports and the second connection ports. The two network switch chips can update an operation status for each other through the direct link and whereby the first network switch chip and the second network switch can manage data exchange therebetween. Each of the network switch chips has a lookup table therein and the network switch chips can update the lookup table for each other.

Dependencies are inferred from the claim text.