Non-volatile memory with improved programming and method therefor

A method as in 3, further comprising:

• (a) programming said group of memory cells in parallel by applying to each cell a pulse from said series of voltage pulses of the programming voltage waveform associated with each cell;
• (b) verifying said group of memory cells in parallel by determining if each cell has been programmed to a predetermined level associated with the target state of each memory cell,
• (c) inhibiting any cell from said group from further programming when said any cell has been programmed to its predetermined level;
• and
• (d) repeating (a), (b) and (c) until all cells in said group have been programmed to their respective predetermined levels.

A nonvolatile memory, comprising:

• an array of memory cells, each memory cell having a charge storage individually programmable to an associated target charge level corresponding to a target memory state among a plurality of memory states thereof;
• a power bus supplying a plurality of voltages in parallel for programming a memory cell to one of said plurality of memory states;
• and
• a parallel programming system for programming a group of memory cells in parallel, said parallel programming system having a plurality of programming circuits, one for each cell in the group, each programming circuit further comprising:
• a voltage selector selecting one of the plurality of voltages from said power bus, the selected voltage being a function of the target state of the associated memory cell such that the selected voltage is optimum for said programming circuit to produce a programming voltage for programming the memory state towards its target memory state.

A nonvolatile memory as in 16, wherein said programming circuit further comprising:

• a first programming voltage waveform generator coupled to receive said selected voltage to generate a first programming voltage waveform having an initial amplitude which is a function of the selected voltage;
• a sense amplifier for determining the programmed state of the memory cell;
• and
• a program inhibit circuit responsive to the sense amplifier for inhibiting further programming of the cell whenever the programmed state of the memory cell has passed a first predetermined level.

A non-volatile memory as in 17, further comprising:

• a storage element for saving the last programming voltage that causes the programmed state of the associated cell to pass the first predetermined level;
• a second programming voltage waveform generator responsive to said last programming voltage saved for generating a second programming voltage;
• and
• a controller for enabling said second programming voltage waveform generator after all memory cells in the group have passed the first predetermined level.