Semiconductor memory device and data write method
AssigneeSharp Kabushiki Kaisha
InventorsHidenori Morimoto, Koji Inoue
Life of this patent
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Abstract
A semiconductor memory device including a plurality of memory cells is provided. One of the plurality of memory cells includes a variable resistor having a resistance value thereof reversibly changed in accordance with a voltage applied thereto, and a transistor connected to the variable resistor.
Claims10
A semiconductor memory device including a plurality of memory cells, wherein one of the plurality of memory cells includes a variable resistor having a resistance value thereof reversibly changed in accordance with a voltage applied thereto, and a transistor connected to the variable resistor.
A data write method for writing data to a memory cell, wherein the memory cell includes a variable resistor having a resistance value thereof reversibly changed in accordance with a voltage applied thereto, and a transistor connected to the variable resistor, the data write method comprising:
- a first step of applying a first data write voltage to the memory cell;
- a second step of, after the first data write voltage is applied, determining whether or not the resistance value of the variable resistor is within a prescribed range;
- a third step of, when the resistance value of the variable resistor has not reached the prescribed range, applying a second data write voltage which is higher than the first data write voltage to the memory cell;
- and
- a fourth step of repeating the second step and the third step until the resistance value of the variable resistor reaches the prescribed range.
Dependencies are inferred from the claim text.