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US 2004/0174738 A1Published application
Method and apparatus for testing a CAM addressed cache
AssigneeIntel Corporation
InventorsLawrence T. Clark, Jay B. Miller
Life of this patent
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Abstract
In one embodiment, an array of content addressable memory (CAM) cells include a first plurality of CAM cells and a second plurality of CAM cells. The second plurality of CAM cells has a width sufficient to address a height of the array. A first plurality of CAM drivers are coupled to the array to drive the first plurality of CAM cells. The first plurality of CAM drivers prevent the first plurality of CAM cells from participating in a match when the array is in a test mode.
Claims8
A method comprising:
- using a plurality of cells of a content addressable memory (CAM) array as a decoder;
- and
- algorithmically testing a second plurality of cells of the array based on addresses provided by the first plurality.
Dependencies are inferred from the claim text.