Semiconductor device and method of manufacturing the same
AssigneeNEC Electronics Corporation
InventorsYuri Masuoka, Naohiko Kimizuka
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Abstract
A technology of restraining junction leakage in a semiconductor device is to be provided. There is provided a semiconductor device provided with a semiconductor substrate, a gate electrode 9 formed on the semiconductor substrate, and a source/drain region formed beside the gate electrode, wherein the source/drain region 4 comprises a first impurity diffusion region including a first P-type impurity and located in the proximity of a surface of the semiconductor substrate, and a second P-type impurity diffusion region located below the first impurity diffusion region and including a second P-type impurity having a smaller diffusion coefficient in the semiconductor substrate than the first P-type impurity.
Claims13
A semiconductor device provided with a semiconductor substrate;
- a gate electrode formed on said semiconductor substrate;
- and an impurity diffusion region formed beside said gate electrode;
- wherein:
- the impurity diffusion region comprises a first impurity diffusion region including a first P-type impurity and located in the proximity of a surface of the semiconductor substrate;
- and
- a second P-type impurity diffusion region located below the first impurity diffusion region and including a second P-type impurity having a smaller diffusion coefficient in the semiconductor substrate than the first P-type impurity.
A method of manufacturing a semiconductor device provided with a semiconductor substrate, a gate electrode formed on said semiconductor substrate and an impurity diffusion region formed beside said gate electrode, comprising:
- forming a first impurity diffusion region that constitutes a part of said impurity diffusion region by ion implantation of the first P-type impurity in a region beside said gate electrode in the proximity of a surface of said semiconductor substrate;
- and
- forming a second impurity diffusion region that constitutes a part of said impurity diffusion region by ion implantation of a second P-type impurity having a smaller diffusion coefficient in said semiconductor substrate than the first P-type impurity, in a region below the first impurity diffusion region.
Dependencies are inferred from the claim text.