Back to results
US 2004/0172572 A1Published application
Pipelined data processor with signal-initiated power management control
AssigneeNational Semiconductor Corporation
InventorsRobert Maher, Raul A. Garibay JR., Margaret R. Herubin, Mark Bluhm
Life of this patent
Estimating the term…
Abstract
A processing unit includes a plurality of subcircuits and circuitry for generating clock signals thereto. Detection circuitry detects the assertion of a control signal and disabling circuitry is operable to disable the clock signals to one or more of the subcircuits responsive to the control signal.
Claims22
A processing unit, comprising:
- a plurality of subcircuits;
- circuitry for generating a clock signal to said plurality of subcircuits;
- circuitry for detecting the assertion of a control signal;
- and
- circuitry coupled to said detecting circuitry for disabling the clock signal to ones of said subcircuits responsive to said control signal.
2 more elements
A computer comprising:
- a processing unit comprising;
- a plurality of subcircuits;
- circuitry for generating a clock signal to said plurality of subcircuits;
- circuitry for detecting the assertion of a control signal;
- and
- circuitry coupled to said detecting circuitry for disabling the clock signal to ones of said subcircuits responsive to said control signal;
- circuitry for detecting conditions for suspending operations of said processing unit and asserting said control signal responsive thereto;
- and
- circuitry for detecting conditions for resuming operation of said processing unit and de-asserting said control signal responsive thereto.
6 more elements
A method of conserving power consumed by a processing unit comprising the steps of:
- generating a clock signal to a plurality of subcircuits;
- detecting the assertion of a control signal;
- disabling the clock signal to ones of said subcircuits responsive to said control signal.
Dependencies are inferred from the claim text.