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US 2004/0171224 A1Published application
Method for fabricating a semiconductor device having an insulation film with reduced water content
AssigneeFujitsu Limited
InventorsKousuke Suzuki, Katsuyuki Karakawa
Life of this patent
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Abstract
A semiconductor device having a self-aligned contact hole is formed by providing a side wall oxide film on a gate electrode, covering the gate electrode and the side wall oxide film by an oxide film and further covering the oxide film by a nitride film, wherein the oxide film is formed by a plasma CVD process with a reduced plasma power such that the H2O content in the oxide film is less than about 2.4 wt %.
Claims41
A method of fabricating a semiconductor device, comprising the steps of:
- forming a gate electrode on a substrate;
- forming a diffusion region in said substrate adjacent to said gate electrode;
- forming a side wall oxide film on a side wall of said gate electrode;
- forming an interlayer insulation film on said substrate such that said interlayer insulation film covers said gate electrode and further said side wall oxide film;
- and
- forming a self-aligned opening in said interlayer insulation film such that said self-aligned opening exposes said diffusion region;
- said step of forming said self-aligned opening comprising the steps of:
- forming a first insulation film of an oxide such that said first insulation film covers said side wall oxide film and said diffusion region;
- depositing a second insulation film having a composition different from a composition of said first insulation film, on said first insulation film;
- forming said interlayer insulation film on said second insulation film;
- forming a contact hole in said interlayer insulation film in correspondence to said diffusion region by an etching process while using said second insulation film as an etching stopper;
- removing said second insulation film exposed at a bottom of said contact hole by an etching process while using said first insulation film as an etching stopper;
- and
- removing said first insulation film exposed at a bottom of said contact hole selectively with respect to said diffusion region;
- wherein said step of forming said first insulation film is conducted by a plasma CVD process, with a high-frequency power set smaller than a high-frequency power in which said first insulation film contains H2O with an amount of about 2.4 wt %.
12 more elements
A method of fabricating a semiconductor device, comprising the steps of:
- forming a gate electrode on a substrate;
- forming a diffusion region in said substrate adjacent to said gate electrode;
- forming a side wall oxide film on a side wall of said gate electrode;
- forming an interlayer insulation film on said substrate such that said interlayer insulation film covers said gate electrode and further said side wall oxide film;
- and
- forming a self-aligned opening in said interlayer insulation film such that said self-aligned opening exposes said diffusion region;
- said step of forming said self-aligned opening comprising the steps of:
- forming a first insulation film of an oxide such that said first insulation film covers said side wall oxide film and said diffusion region;
- depositing a second insulation film having a composition different from a composition of said first insulation film, on said first insulation film;
- forming said interlayer insulation film on said second insulation film;
- forming a contact hole in said interlayer insulation film in correspondence to said diffusion region by an etching process while using said second insulation film as an etching stopper;
- removing said second insulation film exposed at a bottom of said contact hole by an etching process while using said first insulation film as an etching stopper;
- and
- removing said first insulation film exposed at a bottom of said contact hole selectively with respect to said diffusion region;
- wherein said step of forming said first insulation film is conducted by a CVD process that uses SiH4 and N2O as source gases.
12 more elements
A method of fabricating a semiconductor device, comprising the steps of:
- forming a gate electrode on a substrate;
- forming a diffusion region in said substrate adjacent to said gate electrode;
- forming a side wall oxide film on a side wall of said gate electrode;
- forming an interlayer insulation film on said substrate such that said interlayer insulation film covers said gate electrode and further said side wall oxide film;
- and
- forming a self-aligned opening in said interlayer insulation film such that said self-aligned opening exposes said diffusion region;
- said step of forming said self-aligned opening comprising the steps of:
- forming a first insulation film of an oxide such that said first insulation film covers said side wall oxide film and said diffusion region;
- depositing a second insulation film having a composition different from a composition of said first insulation film, on said first insulation film;
- forming said interlayer insulation film on said second insulation film;
- forming a contact hole in said interlayer insulation film in correspondence to said diffusion region by an etching process while using said second insulation film as an etching stopper;
- removing said second insulation film exposed at a bottom of said contact hole by an etching process while using said first insulation film as an etching stopper;
- and
- removing said first insulation film exposed at a bottom of said contact hole selectively with respect to said diffusion region;
- wherein said step of forming said first insulation film is conducted by depositing a silicate glass containing P.
12 more elements
A semiconductor device, comprising:
- a substrate;
- a gate electrode provided on said substrate;
- a diffusion region formed in said substrate adjacent to said gate electrode;
- a side-wall insulation film formed on a side wall of said gate electrode;
- and
- a self-aligned contact hole defined by said side-wall oxide film and exposing said diffusion region;
- wherein said semiconductor device further includes:
- a first insulation film provided on said gate electrode so as to cover said side wall oxide film partially;
- a second insulation film having a composition different from a composition of said first insulation film and provided on said first insulation film;
- an interlayer insulation film deposited on said second insulation film;
- a contact hole formed in said interlayer insulation film, said contact hole extending through said first and second insulation films and exposing said self-aligned contact hole;
- said first insulation film contains H2O with an amount smaller than about 2.4 wt %.
9 more elements
A semiconductor device, comprising:
- a substrate;
- a gate electrode provided on said substrate;
- a diffusion region formed in said substrate adjacent to said gate electrode;
- a side-wall insulation film formed on a side wall of said gate electrode;
- and
- a self-aligned contact hole defined by said side-wall oxide film and exposing said diffusion region;
- wherein said semiconductor device further includes:
- a first insulation film provided on said gate electrode so as to cover said side wall oxide film partially;
- a second insulation film having a composition different from a composition of said first insulation film and provided on said first insulation film;
- an interlayer insulation film deposited on said second insulation film;
- a contact hole formed in said interlayer insulation film, said contact hole extending through said first and second insulation films and exposing said self-aligned contact hole;
- said first insulation film is formed of PSG containing P with an amount of about 6 wt % or less.
9 more elements
A semiconductor device, comprising:
- a substrate;
- a gate electrode provided on said substrate;
- a diffusion region formed in said substrate adjacent to said gate electrode;
- a side-wall insulation film formed on a side wall of said gate electrode;
- and
- a self-aligned contact hole defined by said side-wall oxide film and exposing said diffusion region;
- wherein said semiconductor device further includes:
- a first insulation film provided on said gate electrode so as to cover said side wall oxide film partially;
- a second insulation film having a composition different from a composition of said first insulation film and provided on said first insulation film;
- an interlayer insulation film deposited on said second insulation film;
- a contact hole formed in said interlayer insulation film, said contact hole extending through said first and second insulation films and exposing said self-aligned contact hole;
- said first insulation film is formed of BPSG containing B with an amount of about 4 wt % or less.
9 more elements
Dependencies are inferred from the claim text.