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US 2004/0170077 A1Published application
Semiconductor memory device
AssigneeHynix Semiconductor Inc.
InventorJong Hun Park
Life of this patent
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Abstract
The present disclosure relates to a semiconductor memory device. A charge recycling circuit is driven to raise a potential of a restore node and a sensing bar node to a given potential before a sensing operation is performed. After the sensing operation is performed, electric charges discharged from the restore node and from the sensing bar node are stored using the charge recycling circuit and can then be used when a next sensing operation is performed. Therefore, current consumed when the sensing operation is performed can be reduced and the power consumption can be thus reduced.
Claims8
A semiconductor memory device, comprising:
- a memory cell array comprising a plurality of cells;
- a plurality of sense amplifiers coupled to respective bit lines and respective bit-bar lines of respective cells in the plurality of cells, each of the plurality of sense amplifiers having a first terminal and a second terminal;
- a control signal generating circuit to generate first, second, and third control signals;
- a first switch to selectively couple the first terminals of the plurality of sense amplifiers to a power supply voltage terminal in response to the first control signal;
- a second switch to selectively couple the second terminals of the plurality of sense amplifiers to a ground voltage terminal in response to the second control signal;
- a third switch to selectively couple the first terminals of the plurality of sense amplifiers to a first charge recycling store in response to the third control signal;
- and
- a fourth switch to selectively couple the second terminals of the plurality of sense amplifiers to a second charge recycling store in response to the third control signal.
5 more elements
Dependencies are inferred from the claim text.