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US 2004/0169702 A1Published application
Energy balanced printhead design
AssigneeHewlett-Packard Development Company, L.P.
InventorsJoseph M. Torgerson, Robert N.K. Browning, Mark H. MacKenzie, Patrick V. Boyd
Life of this patent
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Abstract
A narrow ink jet printhead having efficient FET drive circuits that are configured to compensate for parasitic resistances of power traces. The ink jet printhead further includes ground busses that overlap active regions of the FET drive circuits.
Claims21
An ink jet print head comprising:
- a printhead substrate including a plurality of thin film layers;
- a columnar array of drop generators defined in said printhead substrate and extending along a longitudinal axis L;
- each drop generator having a heater resistor having a resistance of at least 100 ohms;
- a columnar array of FET circuits formed in said printhead substrate and respectively connected to said drop generators, said FET circuits including active regions each comprised of drain regions, source regions, and a gate disposed on a gate oxide layer, each PET circuit having an on-resistance that is less than (250,000 ohm·micrometers2)/A, wherein A is an area of such FET circuit in micrometers2;
- power traces connected to said drop generators and said FET drive circuits;
- and
- said FET drive circuits configured to compensate for a variation in a parasitic resistance presented by said power traces.
4 more elements
Dependencies are inferred from the claim text.