Method for increasing rate at which a comparator in a metastable condition transitions to a steady state
AssigneeBroadcom Corporation
InventorsJan Mulder, Franciscus M.L. van der Goes
Life of this patent
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Abstract
A method for reducing bit errors in an analog to digital converter having an array of comparators. The outputs of first and second comparators are received as in inputs to an Exclusive OR gate. The first and second comparators are separated in the array by a third comparator. The output of the Exclusive OR gate is used to determine if the third comparator is in a metastable condition. If the third comparator is in a metastable condition, the bias current of the latch circuit of the third comparator is increased to increase the rate at which the third comparator transitions to a steady state.
Claims25
An array of comparators, comprising:
- a first, a second, and a third comparator;
- an Exclusive OR gate having a first input connected to an output of said first comparator and a second input connected to an output of said second comparator;
- and
- a variable current source connected to an output of said Exclusive OR gate, said variable current source supplying a bias current to said third comparator.
An analog to digital converter, comprising:
- an array of comparators, having respective inputs configured to receive an analog signal, and respective outputs configured to produce quantized signals responsive to said analog signal;
- a priority encoder connected to said array of comparators, configured to produce a digital signal at an output responsive to said quantized signals;
- an array of Exclusive OR gates, wherein each Exclusive OR gate of said array of Exclusive OR gates is configured to receive two of said quantized signals;
- and
- an array of variable current sources, wherein each variable current source of said array of variable current sources is configured to provide a bias current to a corresponding comparator of said array of comparators, and is controlled by an output of a corresponding Exclusive OR gate of said array of Exclusive OR gates.
In an array of comparators, a method for increasing a rate at which a comparator in a metastable condition transitions to a steady state, comprising the steps of:
- (1) identifying, in the array of comparators, the comparator in the metastable condition;
- and
- (2) providing a bias current to said identified comparator in the metastable condition, such that the rate at which the comparator in the metastable condition transitions to the steady state is increased.
In an array of comparators that includes a first, a second, and a third comparator, a method for increasing a rate at which the third comparator transitions to a steady state, comprising the steps of:
- (1) comparing an output of the first comparator with an output of the second comparator;
- and
- (2) providing a bias current to the third comparator based on said compared first and second outputs.
23 The method of claim 22, wherein said providing step comprises the step of:
- controlling a variable current source that provides the bias current for a latch circuit of the third comparator based on an output of the Exclusive OR gate.
The method of claim 25, further comprising the step of:
- controlling a switch that connects the first current source in parallel with the second current source based on an output of an Exclusive OR gate.
Dependencies are inferred from the claim text.