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AssigneeSTMicroelectronics S.r.l.
InventorsPierangelo Confalonieri, Germano Nicollini, Riccardo Martignone
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The circuit comprises a differential amplifier (10) with two inputs and two outputs and a common mode regulation circuit. Between a regulation terminal (INCM) of the amplifier and the outputs there are connected a first (C1p) and a second (1m) capacitor and first (C3) and second (C4) capacitive means that by means of controlled switches (SW9-SW12) can be alternatively and simultaneousy connected in parallel with, respectively, the first ((C1p) and the second (C1m) capacitor or between a first (VB) and a second (Vref1) reference voltage terminal. The capacitances C3 and C4 may be different in value such as to satisfy the following equality: Vcmn=Vref1+(Vrefp−Vrefm)/2!*(C4−C3)/(C3+C4), where Vcmn is the desired common mode output voltage, Vrefp and Vrefm are the differential output voltages and Vref1 is the voltage of the second reference terminal are chosen in such a way as to satisfy the following equality: Vcmn=Vref1+[(Vrefp−Vrefm)/2]*(C4−C3)/(C3+C4), where Vcmn is the desired common mode output voltage, Vrefp and Vrefm are the differential output voltages and Vrefl is the voltage of the second reference terminal.
A fully differential amplifier circuit with switched capacitors comprising
A circuit in accordance with any one of the preceding claims comprising two sampling capacitors (CSp, CSm) having respective first electrodes that can be selectively connected by means of respective controlled switches (SW1, SW2) to the first and the second input terminal of the amplifier (10) and respective second electrodes that can be selectively connected by means of respective controlled switches (SW3, SW4) to the output of a reference voltage generator (Vref) or to a common reference terminal.
A circuit in accordance with any one of the preceding claims comprising, respectively between the first input terminal and the first output terminal and between the second input terminal and the second output terminal, a first (CIp) and a second (CIm) integration capacitor and a first and a second dumping capacitor (CDp, CDm) that can be connected in parallel with the first and second integration capacitor by means of respective controlled switches (SW5, SW6).
A circuit system comprising an amplifier circuit in accordance with any one of the preceding claims, a generator of a single-ended reference voltage and coupling means between the output of the reference voltage generator and each of the input terminals of the differential amplifier, wherein the reference voltage terminal is connected to the output of the reference voltage generator.
Dependencies are inferred from the claim text.