Phase indication apparatus
AssigneeIntel Corporation
InventorsMichael Pang-Cheng Hsu, Rajendran Nair, Stephen R. Mooney
Life of this patent
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Abstract
A variety of embodiments may include a voltage controlled oscillator to generate a differential signal on two nodes; and phase detector to compare a phase of the differential signal and a phase of a received signal, the phase detector including a sampling circuit to periodically sample voltage values on the two nodes, and a linear voltage-to-current converter responsive to the voltage values to create a control voltage for the voltage controlled oscillator.
Claims16
A circuit, including:
- a voltage controlled oscillator to generate a differential signal on two nodes;
- and
- a phase detector to compare a phase of the differential signal and a phase of a received signal, the phase detector including a sampling circuit to periodically sample voltage values on the two nodes, and a linear voltage-to-current converter responsive to the voltage values to create a control voltage for the voltage controlled oscillator.
An integrated circuit including a phase lock loop, the phase lock loop comprising:
- a voltage-to-current circuit to influence a voltage on a capacitor;
- a voltage controlled oscillator responsive to the voltage on the capacitor to provide a second clock signal;
- and
- a sampling circuit responsive to a first clock signal and the second clock signals, and to generate two voltage values, a difference of the two voltage values being a function of a phase difference between the first and second clock signals.
An integrated circuit, including:
- a phase lock loop having a voltage-to-current circuit to influence a voltage on a capacitor;
- a voltage controlled oscillator responsive to the voltage on the capacitor to provide a second clock signal, and a sampling circuit responsive to a first clock signal and the second clock signal, and to generate two voltage values, a difference of the two voltage values being a function of a phase difference between the first and second clock signals;
- and
- a plurality of sequential elements coupled to the phase lock loop.
Dependencies are inferred from the claim text.