Power supply packaging system
AssigneePower-One, Inc.
InventorJohn A. Maxwell
Life of this patent
Estimating the term…
Abstract
A packaging system for a high current, low voltage power supply. The power supply uses bare die power FETs which are directly mounted to a thermally conductive substrate by a solder attachment made to the drain electrode metallization on the back side of the FETs. The source electrode and gate electrode of each FET are coupled to the circuitry on an overhanging printed circuit board, using CSP solder balls affixed to the front side of the FET die. The heat generated by the FETs is effectively dissipated by the close coupling of the FETs to the thermally conductive underlying substrate.
Claims23
A power supply package comprising:
- a thermally conductive substrate, electrically coupled to a first current handling terminal on a first surface of a semiconductor die;
- a printed circuit board, electrically coupled to a second current handling terminal on an opposing surface of the semiconductor die;
- wherein the thermally conductive substrate is attached to the printed circuit board.
A method for manufacturing a power supply package, comprising:
- coupling a first current handling terminal of one or more semiconductor die to a printed circuit board;
- attaching a thermally conductive substrate to the printed circuit board, with the semiconductor die positioned between the substrate and the printed circuit board;
- and
- coupling a second current handling terminal of the one or more semiconductor die directly to a conductive trace on the thermally conductive substrate.
Dependencies are inferred from the claim text.