Semiconductor device and method of manufacturing the same
AssigneeSemiconductor Energy Laboratory Co., Ltd., a Japan corporation
InventorsEtsuko Fujimoto, Satoshi Murakami, Shunpei Yamazaki, Shingo Eguchi
Life of this patent
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Abstract
A semiconductor device with high reliability and operation performance is manufactured without increasing the number of manufacture steps. A gate electrode has a laminate structure. A TFT having a low concentration impurity region that overlaps the gate electrode or a TFT having a low concentration impurity region that does not overlap the gate electrode is chosen for a circuit in accordance with the function of the circuit.
Claims27
A semiconductor device having a TFT that is formed in a pixel portion and an n-channel TFT and a p-channel TFT that constitute a driver circuit provided in the periphery of the pixel portion, all of the TFTs being formed on the same substrate,
- wherein the n-channel TFT has a second concentration impurity region that partially overlaps a gate electrode, and
- wherein the p-channel TFT and the TFT formed in the pixel portion respectively have second concentration impurity regions that do not overlap gate electrodes.
A semiconductor device having a TFT that is formed in a pixel portion and an n-channel TFT and a p-channel TFT that constitute a driver circuit provided in the periphery of the pixel portion, all of the TFTs being formed on the same substrate,
- wherein the n-channel TFT has a gate electrode comprising a first conductive film and a second conductive film, the first conductive film contacting the top face of a gate insulating film, the second conductive film contacting the top face of the first conductive film, the first conductive film being longer than the second conductive film in the channel length direction, the first conductive film partially overlapping a second concentration impurity region, and
- wherein the p-channel TFT and the TFT formed in the pixel portion respectively have gate electrodes that do not overlap second concentration impurity regions, the gate electrodes comprising the first conductive film that contacts the top face of the gate insulating film and the second conductive film that contacts the top face of the first conductive film, the first conductive film and the second conductive film having the same length in the channel length direction.
A semiconductor device having a driver circuit comprising an n-channel TFT, a first p-channel TFT, and a second p-channel TFT, wherein:
- the n-channel TFT has a semiconductor layer, a gate insulating film formed on the semiconductor layer, and a gate electrode formed on the gate insulating film, the semiconductor layer including a channel formation region, a source region, a drain region, and a second concentration impurity region:
- the gate electrode comprises a first conductive film and a second conductive film, the first conductive film contacting the top face of the gate insulating film, the second conductive film contacting the top face of the first conductive film;
- the second concentration impurity region overlaps the first conductive film with the gate insulating film interposed therebetween;
- the first p-channel TFT has a semiconductor layer, a gate insulating film formed on the semiconductor layer, and a gate electrode formed on the gate insulating film, the semiconductor layer including a channel formation region, a source region, a drain region, and a fifth concentration impurity region;
- the channel formation region and the gate electrode of the first p-channel TFT have substantially the same length in the channel length direction;
- the second p-channel TFT has a semiconductor layer, a gate insulating film formed on the semiconductor layer, and a gate electrode formed on the gate insulating film, the semiconductor layer including a channel formation region, a source region, a drain region, and a fifth concentration impurity region;
- the gate electrode of the second p-channel TFT comprises a first conductive film and a second conductive film, the first conductive film contacting the top face of the gate insulating film, the second conductive film contacting the top face of the first conductive film;
- and
- the fifth concentration impurity region of the second p-channel TFT overlaps the first conductive film with the gate insulating film interposed therebetween.
A semiconductor device having a driver circuit comprising an n-channel TFT, a first p-channel TFT, and a second p-channel TFT, wherein:
- the n-channel TFT has a semiconductor layer, a gate insulating film formed on the semiconductor layer, and a gate electrode formed on the gate insulating film, the semiconductor layer including a channel formation region, a source region, a drain region, and a second concentration impurity region;
- the gate electrode comprises a first conductive film and a second conductive film, the first conductive film contacting the top face of the gate insulating film, the second conductive film contacting the top face of the first conductive film;
- the second concentration impurity region overlaps the first conductive film with the gate insulating film interposed therebetween;
- the first p-channel TFT has a semiconductor layer, a gate insulating film formed on the semiconductor layer, and a gate electrode formed on the gate insulating film, the semiconductor layer including a channel formation region, a source region, a drain region, a fifth concentration impurity region and an offset region;
- the second p-channel TFT has a semiconductor layer, a gate insulating film formed on the semiconductor layer, and a gate electrode formed on the gate insulating film, the semiconductor layer including a channel formation region, a source region, a drain region, and a fifth concentration impurity region;
- the gate electrode of the second p-channel TFT comprises a first conductive film and a second conductive film, the first conductive film contacting the top face of the gate insulating film, the second conductive film contacting the top face of the first conductive film;
- and
- the fifth concentration impurity region of the second p-channel TFT overlaps the first conductive film with the gate insulating film interposed therebetween.
A semiconductor device having a driver circuit and a pixel portion, the driver circuit comprising an n-channel TFT, a first p-channel TFT, and a second p-channel TFT, the pixel portion including a TFT and a storage capacitor, wherein:
- the n-channel TFT has a semiconductor layer, a gate insulating film formed on the semiconductor layer, and a gate electrode formed on the gate insulating film, the semiconductor layer including a channel formation region, a source region, a drain region, and a second concentration impurity region;
- the gate electrode comprises a first conductive film and a second conductive film, the first conductive film contacting the top face of the gate insulating film, the second conductive film contacting the top face of the first conductive film;
- the second concentration impurity region overlaps the first conductive film with the gate insulating film interposed therebetween;
- the first p-channel TFT has a semiconductor layer, a gate insulating film formed on the semiconductor layer, and a gate electrode formed on the gate insulating film, the semiconductor layer including a channel formation region, a source region, a drain region, a fifth concentration impurity region, and an offset region;
- the second p-channel TFT has a semiconductor layer, a gate insulating film formed on the semiconductor layer, and a gate electrode formed on the gate insulating film, the semiconductor layer including a channel formation region, a source region, a drain region, and a fifth concentration impurity region;
- the gate electrode of the second p-channel TFT comprises a first conductive film and a second conductive film, the first conductive film contacting the top face of the gate insulating film, the second conductive film contacting the top face of the first conductive film;
- the fifth concentration impurity region of the second p-channel TFT overlaps the first conductive film with the gate insulating film interposed therebetween;
- and
- the TFT formed in the pixel portion has a semiconductor layer that includes a channel formation region, a source region, a drain region, a second impurity region, and an offset region.
A semiconductor device having a driver circuit comprising an n-channel TFT, a first p-channel TFT, and a second p-channel TFT, wherein:
- the n-channel TFT has a semiconductor layer, a gate insulating film formed on the semiconductor layer, and a gate electrode formed on the gate insulating film, the semiconductor layer including a channel formation region, a source region, a drain region, and a second concentration impurity region;
- the gate electrode comprises a first conductive film and a second conductive film, the first conductive film contacting the top face of the gate insulating film, the second conductive film contacting the top face of the first conductive film;
- the second concentration impurity region has an Lov region and an Loff region, wherein the Lov region overlaps the first conductive film with the gate insulating film interposed therebetween, and wherein the Loff region does not overlap the first conductive film;
- and
- the first p-channel TFT and the second p-channel TFT respectively have semiconductor layers, each of the semiconductor layers including a channel formation region, a source region, a drain region, and a fifth concentration impurity region.
A method of manufacturing a semiconductor device comprising the steps of:
- forming a semiconductor layer on an insulating surface;
- forming an insulating film on the semiconductor layer;
- forming, on the insulating film, a first shape conductive layer that is a laminate of a first shape first conductive film and a first shape second conductive film;
- forming a first concentration impurity region by doping the semiconductor layer with an n type impurity element using the first shape conductive layer as a mask;
- etching the first shape conductive layer electrode to form a second shape conductive layer that is a laminate of a second shape first conductive film and a second shape second conductive film;
- forming a second concentration impurity region or a third concentration impurity region by doping the semiconductor layer with an n type impurity element transmitted through the second shape first conductive film using the second shape second conductive film as a mask;
- forming a third shape conductive layer by etching the second shape first conductive film using the second shape second conductive film as a mask, the third shape conductive layer consisting of a laminate of a third shape first conductive film and a third shape second conductive film:
- and
- etching a gate insulating film using the third shape conductive layer electrode as a mask.
A method of manufacturing a semiconductor device comprising the steps of:
- forming a semiconductor layer on an insulating surface;
- forming an insulating film on the semiconductor layer;
- forming, on the insulating film, a first shape conductive layer that is a laminate of a first shape conductive film and a second shape conductive film;
- forming a first concentration impurity region by doping the semiconductor layer with an n type impurity element using the first shape conductive layer as a mask;
- etching the first shape conductive layer to form a second shape conductive layer that is a laminate of a second shape first conductive film and a second shape second conductive film;
- forming a second concentration impurity region or a third concentration impurity region by doping the semiconductor layer with an n type impurity element transmitted through the second shape first conductive film using the second shape second conductive film as a mask;
- forming a resist mask in a region for forming an n-channel TFT of a driver circuit portion;
- forming, in a region where the resist mask is not formed, a third shape conductive layer by etching the second shape first conductive film using the second shape second conductive film as a mask, the third shape conductive layer consisting of a laminate of a third shape first conductive film and a third shape second conductive film;
- peeling the resist mask formed;
- and
- etching a gate insulating film using the third shape conductive layer as a mask.
A method of manufacturing a semiconductor device comprising the steps of:
- forming an amorphous semiconductor film on an insulating surface;
- irradiating the amorphous semiconductor film with laser light to form a crystalline semiconductor film, thereby completing a semiconductor layer;
- forming a gate insulating film covering the semiconductor layer;
- forming a first conductive film and a second conductive film on the gate insulating film;
- etching the first conductive film and the second conductive film to form a first shape conductive layer:
- forming a first concentration impurity region by doping the semiconductor layer with an n type impurity element;
- etching the first shape conductive layer to form a second shape conductive layer;
- doping the semiconductor layer with an n type impurity element to form a second concentration impurity region;
- forming a fourth concentration impurity region and a fifth concentration impurity region by covering an n-channel TFT and a TFT formed in a pixel portion with a resist mask and then doping the semiconductor layer with a p type impurity element:
- and
- forming a third shape conductive layer by covering the n-channel TFT and a second p-channel TFT with a resist mask and then etching the second shape conductive layer.
A method of manufacturing a semiconductor device comprising the steps of:
- forming an amorphous semiconductor film on an insulating surface;
- irradiating the amorphous semiconductor film with laser light to form a crystalline semiconductor film, thereby completing a semiconductor layer;
- forming a gate insulating film covering the semiconductor layer;
- forming a first conductive film and a second conductive film on the gate insulating film;
- etching the first conductive film and the second conductive film to form a first shape conductive layer;
- forming a first concentration impurity region by doping the semiconductor layer with an n type impurity element;
- etching the first shape conductive layer to form a second shape conductive layer;
- doping the semiconductor layer with an n type impurity element to form a second concentration impurity region;
- forming a fourth concentration impurity region and a fifth concentration impurity region by covering an n-channel TFT and a TFT formed in a pixel portion with a resist mask and then doping the semiconductor layer with a p type impurity element;
- and
- forming offset regions respectively in the semiconductor layer of the TFT formed in the pixel portion and in the semiconductor layer of a first p-channel TFT by covering the n-channel TFT and a second p-channel TFT with a resist mask and then etching the second shape conductive layer to form a third shape conductive layer.
A method of manufacturing a semiconductor device comprising the steps of:
- forming an amorphous semiconductor film on an insulating surface;
- irradiating the amorphous semiconductor film with laser light to form a crystalline semiconductor film, thereby completing a semiconductor layer;
- forming a gate insulating film covering the semiconductor layer;
- forming a first conductive film and a second conductive film on the gate insulating film;
- etching the first conductive film and the second conductive film to form a first shape conductive layer;
- forming a first concentration impurity region by doping the semiconductor layer with an n type impurity element;
- etching the first shape conductive layer to form a second shape conductive layer;
- forming a fourth concentration impurity region and a fifth concentration impurity region by covering an n-channel TFT and a TFT formed in a pixel portion with a resist mask and then doping the semiconductor layer with a p type impurity element;
- forming a third shape conductive layer by covering the n-channel TFT and a second p-channel TFT with a resist mask and then etching the second shape conductive layer in a first p-channel TFT and in the TFT formed in the pixel portion;
- and
- forming a second concentration impurity region by doping the semiconductor layer with an n type impurity element.
A method of manufacturing a semiconductor device comprising the steps of:
- forming an amorphous semiconductor film on an insulating surface;
- irradiating the amorphous semiconductor film with laser light to form a crystalline semiconductor film, thereby completing a semiconductor layer;
- forming a gate insulating film covering the semiconductor layer;
- forming a first conductive film and a second conductive film on the gate insulating film;
- etching the first conductive film and the second conductive film to form a first shape conductive layer;
- forming a first concentration impurity region by doping the semiconductor layer with an n type impurity element;
- etching the first shape conductive layer to form a second shape conductive layer;
- doping the semiconductor layer with an n type impurity element to form a second concentration impurity region;
- forming a third shape conductive layer by covering the n-channel TFT with a resist mask and then etching the second shape conductive layer in a first p-channel TFT, in a second p-channel TFT, and in a TFT formed in a pixel portion;
- etching the gate insulating film;
- and
- forming a fourth concentration impurity region and a fifth concentration impurity region by covering the n-channel TFT and the TFT formed in the pixel portion with a resist mask and then doping the semiconductor layer with a p type impurity element.
A method of manufacturing a semiconductor device comprising the steps of:
- forming an amorphous semiconductor film on an insulating surface;
- irradiating the amorphous semiconductor film with laser light to form a crystalline semiconductor film, thereby completing a semiconductor layer;
- forming a gate insulating film covering the semiconductor layer;
- forming a first conductive film and a second conductive film on the gate insulating film;
- etching the first conductive film and the second conductive film to form a first shape conductive layer;
- forming a first concentration impurity region by doping the semiconductor layer with an n type impurity element;
- etching the first shape conductive layer to form a second shape conductive layer;
- doping the semiconductor layer with an n type impurity element to form a second concentration impurity region;
- etching the second shape conductive layer after covering an n-channel TFT with a resist mask;
- and
- forming a fourth concentration impurity region and a fifth concentration impurity region by covering the n-channel TFT and a TFT formed in a pixel portion with a resist mask and then doping the semiconductor layer with a p type impurity element.
A method of manufacturing a semiconductor device comprising the steps of:
- forming an amorphous semiconductor film on an insulating surface;
- irradiating the amorphous semiconductor film with laser light to form a crystalline semiconductor film, thereby completing a semiconductor layer;
- forming a gate insulating film covering the semiconductor layer;
- forming a first conductive film and a second conductive film on the gate insulating film;
- etching the first conductive film and the second conductive film to form a first shape conductive layer;
- forming a first concentration impurity region by doping the semiconductor layer with an n type impurity element;
- etching the first shape conductive layer to form a second shape conductive layer;
- doping the semiconductor layer with an n type impurity element to form a second concentration impurity region having a region that overlaps a gate electrode with the gate insulating film interposed therebetween and a region that does not overlap the gate electrode;
- forming a third shape conductive layer by covering the n-channel TFT with a resist mask and then etching the second shape conductive layer in a first p-channel TFT, in a second p-channel TFT, and in a TFT formed in a pixel portion;
- and
- forming a fourth concentration impurity region and a fifth concentration impurity region by covering the n-channel TFT and the TFT formed in the pixel portion with a resist mask and then doping the semiconductor layer with a p type impurity element.
A method of manufacturing a semiconductor device comprising the steps of:
- forming an amorphous semiconductor film on an insulating surface;
- irradiating the amorphous semiconductor film with laser light to form a crystalline semiconductor film, thereby completing a semiconductor layer;
- forming a gate insulating film covering the semiconductor layer;
- forming a first conductive film and a second conductive film on the gate insulating film;
- etching the first conductive film and the second conductive film to form a first shape gate electrode and a wiring line;
- forming a first concentration impurity region by doping the semiconductor layer with an n type impurity element;
- etching the first shape conductive layer to form a second shape conductive layer;
- doping the semiconductor layer with an n type impurity element to form a second concentration impurity region;
- forming a third shape conductive layer by covering an n-channel TFT and a second p-channel TFT with a resist mask and then etching the second shape conductive layer;
- forming a fourth concentration impurity region and a fifth concentration impurity region by covering the n-channel TFT and a TFT formed in a pixel portion with a resist mask and then doping the semiconductor layer with a p type impurity element;
- and
- forming an inorganic interlayer insulating film over an entire surface.
Dependencies are inferred from the claim text.