Semiconductor device for reading signal from photodiode via transistors

A semiconductor device comprising:

• a plurality of pixels disposed over a semiconductor substrate in a matrix shape;
• wherein:
• each of the pixels comprises a photodiode, a reset transistor;
• a source follower transistor and a select transistor;
• the photodiode comprises an impurity diffusion region of a first conductivity type and an impurity diffusion region of a second conductivity type stacked in a thickness direction;
• each of the reset transistor, the source follower transistor and the select transistor comprises a pair of impurity diffusion regions of a first conductivity type formed in a surface layer of the semiconductor substrate and having a channel region between the impurity diffusion regions and a gate electrode formed over the channel region;
• the photodiode, the reset transistor, the source follower transistor and the select transistor are disposed in one active region;
• the active region comprises a first area in which the photodiode is disposed and a second area having a first end continuous with the first area an elongated shape;
• and
• each of gate electrodes of the reset transistor, the source follower transistor and the select transistor crosses the second area, and a cross area between the gate electrode of the reset transistor and the second region, a cross area between the gate electrode of the source follower transistor and the second region and a cross area between the gate electrode of the select transistor and the second region, are disposed in this order in a direction of departing from the first end,
• an intra-pixel wiring line for interconnecting the impurity diffusion region of the reset transistor on the first end side and the gate electrode of the source follower transistor of the pixel, at least a region of the intra-pixel wiring line connected to the impurity diffusion region of the reset transistor on the first end side being made of silicon;
• a reset voltage supply line connected to the impurity diffusion region between the gate electrodes of the reset transistor and the source follower transistor and being applied with a reset voltage for applying an initial reverse bias to the photodiode;
• a reset signal line for applying a reset signal to the gate electrode of the reset transistor;
• a select signal line disposed for each row of the pixels, the select signal line applying a select signal to the gate electrodes of the select transistors of the pixels in a corresponding row;
• and
• a signal read line disposed for each column of the pixels and connected to the impurity diffusion regions, on a side opposite to the first end, of the select transistors of the pixels in a corresponding column.

A semiconductor device comprising:

• a plurality of pixels disposed over a semiconductor substrate in a matrix shape;
• wherein:
• each of the pixels comprises a photodiode, a reset transistor;
• a source follower transistor and a select transistor;
• the photodiode comprises an impurity diffusion region of a first conductivity type and an impurity diffusion region of a second conductivity type stacked in a thickness direction;
• each of the reset transistor, the source follower transistor and the select transistor comprises a pair of impurity diffusion regions of the first conductivity type formed in a surface layer of the semiconductor substrate and having a channel region between the impurity diffusion regions and a gate electrode formed over the channel region;
• the photodiode, the reset transistor, the source follower transistor and the select transistor are disposed in one active region;
• the active region comprises a first area in which the photodiode is disposed and a second area having a first end continuous with the first area and an elongated shape;
• and
• each of gate electrodes of the reset transistor, the source follower transistor and the select transistor crosses the second area, and a cross area between the gate electrode of the reset transistor and the second area, a cross area between the gate electrode of the source follower transistor and the second area and a cross area between the gate electrode of the select transistor and the second area, are disposed in this order in a direction of departing from the first end,
• an intra-pixel wiring line for interconnecting the impurity diffusion region of the reset transistor on the first end side and the gate electrode of the source follower transistor of the pixel;
• a reset voltage supply line connected to the impurity diffusion region between the gate electrodes of the reset transistor and the source follower transistor and being applied with a reset voltage for applying an initial reverse bias to the photodiode;
• a reset signal line for applying a reset signal to the gate electrode of the reset transistor;
• a select signal line disposed for each row of the pixels, the select signal line applying a select signal to the gate electrodes of the select transistors of the pixels in a corresponding row;
• a signal read line disposed for each column of the pixels and connected to the impurity diffusion regions, on a side opposite to the first end, of the select transistors of the pixels in a corresponding column;
• an upper gate protective film covering an upper surface of the gate electrodes of the reset transistor, the source follower transistor and the select transistor;
• a side gate protective film covering sidewalls of the gate electrodes of the reset transistor, the source follower transistor and the select transistor;
• an interlayer insulating film formed over the semiconductor substrate and covering the reset transistor, the source follower transistor and the select transistor;
• a first via hole formed through the interlayer insulating film, an upper surface of the impurity diffusion region of the reset transistor on the first end side appearing on a bottom of the first via hole, and the side gate protective film covering the sidewall of the gate electrode of the reset transistor appearing on a sidewall of the first via hole;
• a second via hole formed through the interlayer insulating film, an upper surface of the impurity diffusion region between the gate electrodes of the reset transistor and the source follower transistor appearing on a bottom of the second via hole, and the side gate protective film covering the sidewall of the gate electrode of the reset transistor and the side gate protective film covering the sidewall of the source follower transistor appearing on a sidewall of the second via hole;
• and
• a third via hole formed through the interlayer insulating film, an upper surface of the impurity diffusion region of the select transistor on a side opposite to the first end side appearing on a bottom of the third via hole, and the side gate protective film covering the sidewall of the gate electrode of the select transistor appearing on a sidewall of the third via hole,
• wherein:
• the intra-pixel wiring line is connected to the impurity diffusion region of the reset transistor on the first end side via the first via hole;
• the reset voltage supply line is connected to the impurity diffusion region between the gate electrodes of the reset transistor and the source follower transistor via the second via hole;
• and
• the signal read line is connected to the impurity diffusion region of the select transistor on a side opposite to the first end side via the third via hole.

A semiconductor device comprising:

• a plurality of pixels disposed over a semiconductor substrate in a matrix shape;
• wherein:
• each of the pixels comprises a photodiode, a reset transistor;
• a source follower transistor and a select transistor;
• the photodiode comprises an impurity diffusion region of a first conductivity type and an impurity diffusion region of a second conductivity type stacked in a thickness direction;
• each of the reset transistor, the source follower transistor and the select transistor comprises a pair of impurity diffusion regions of the first conductivity type formed in a surface layer of the semiconductor substrate and having a channel region between the impurity diffusion regions and a gate electrode formed over the channel region;
• the photodiode, the reset transistor, the source follower transistor and the select transistor are disposed in one active region;
• the active region comprises a first area in which the photodiode is disposed and a second area having a first end continuous with the first area and an elongated shape;
• and
• each of gate electrodes of the reset transistor, the source follower transistor and the select transistor crosses the second area, and a cross area between the gate electrode of the reset transistor and the second area, a cross area between the gate electrode of the source follower transistor and the second area and a cross area between the gate electrode of the select transistor and the second area, are disposed in this order along a direction of departing from the first end,
• an intra-pixel wiring line for interconnecting the impurity diffusion region of the reset transistor on the first end side and the gate electrode of the source follower transistor of the pixel;
• a reset voltage supply line connected to the impurity diffusion region between the gate electrodes of the reset transistor and the source follower transistor and being applied with a reset voltage for applying an initial reverse bias to the photodiode;
• a reset signal line for applying a reset signal to the gate electrode of the reset transistor;
• a select signal line disposed for each row of the pixels, the select signal line applying a select signal to the gate electrodes of the select transistors of the pixels in a corresponding row;
• a signal read line disposed for each column of the pixels and connected to the impurity diffusion regions, on a side opposite to the first end, of the select transistors of the pixels in a corresponding column;
• an interlayer insulating film formed over the semiconductor substrate and covering the reset transistor, the source follower transistor and the select transistor;
• a first via hole formed through the interlayer insulating film, an upper surface of the impurity diffusion region of the reset transistor on the first end side appearing on a bottom of the first via hole;
• a second via hole formed through the interlayer insulating film, an upper surface of the impurity diffusion region between the gate electrodes of the reset transistor and the source follower transistor appearing on a bottom of the second via hole;
• a third via hole formed through the interlayer insulating film, an upper surface of the impurity diffusion region of the select transistor on a side opposite to the first end side appearing on a bottom of the third via hole;
• and
• a sidewall spacer made of insulating material and covering a sidewall of each of the first to third via holes,
• wherein:
• the intra-pixel wiring line is connected to the impurity diffusion region of the reset transistor on the first end side via the first via hole;
• the reset voltage supply line is connected to the impurity diffusion region between the gate electrodes of the reset transistor and the source follower transistor via the second via hole;
• and
• the signal read line is connected to the impurity diffusion region of the select transistor on a side opposite to the first end via the third via hole.

A semiconductor device comprising:

• a plurality of pixels disposed over a semiconductor substrate in a matrix shape;
• wherein:
• each of the pixels comprises a photodiode, a reset transistor, a source follower transistor and a select transistor;
• the photodiode comprises an impurity diffusion region of a first conductivity type and an impurity diffusion region of a second conductivity type stacked in a thickness direction;
• each of the reset transistor, the source follower transistor and the select transistor comprises a pair of impurity diffusion regions of the first conductivity type formed in a surface layer of the semiconductor substrate and having a channel region between the impurity diffusion regions and a gate electrode formed over the channel region;
• the photodiode, the reset transistor, the source follower transistor and the select transistor are disposed in one active region;
• the active region comprises a first area in which the photodiode is disposed and a second area having a first end continuous with the first area and including an area elongated along a first direction;
• and
• each of gate electrodes of the reset transistor, the source follower transistor and the select transistor crosses the area, elongated along the first direction, of the second area, and a cross area between the gate electrode of the reset transistor and the second region, a cross area between the gate electrode of the source follower transistor and the second region and a cross area between the gate electrode of the select transistor and the second region, are disposed in this order in a direction of departing from the first end,
• an intra-pixel wiring line for interconnecting the impurity diffusion region of the reset transistor on the first end side and the gate electrode of the source follower transistor of the pixel;
• a reset voltage supply line connected to the impurity diffusion region between the gate electrodes of the reset transistor and the source follower transistor and being applied with a reset voltage for applying an initial reverse bias to the photodiode;
• a reset signal line for applying a reset signal to the gate electrode of the reset transistor;
• a select signal line disposed for each row of the pixels, the select signal line applying a select signal to the gate electrodes of the select transistors of the pixels in a corresponding row;
• a signal read line disposed for each column of the pixels and connected to the impurity diffusion regions, on a side opposite to the first end, of the select transistors of the pixels in a corresponding column;
• upper gate protective films covering an upper surface of the gate electrodes of the reset transistor, the source follower transistor and the select transistor;
• side gate protective films covering sidewalls of the gate electrodes of the reset transistor, the source follower transistor and the select transistor;
• an interlayer insulating film formed over the semiconductor substrate and covering the reset transistor, the source follower transistor and the select transistor;
• a first via hole formed through the interlayer insulating film, an upper surface of the impurity diffusion region of the reset transistor on the first end side appearing on a bottom of the first via hole;
• a second via hole formed through the interlayer insulating film, an upper surface of the impurity diffusion region between the gate electrodes of the reset transistor and the source follower transistor appearing on a bottom of the second via hole;
• and
• a third via hole formed through the interlayer insulating film, an upper surface of the impurity diffusion region of the select transistor on a side opposite to the first end side appearing on a bottom of the third via hole,
• wherein each of the first via hole, the second via hole and the third via hole has self-aligned contact structure.