Method and system for designing an integrated circuit with reduced noise
AssigneeDenso Corporation
InventorsYasuyuki Ishikawa, Kouji Ichikawa
Life of this patent
Estimating the term…
Abstract
Noise current flowing to the outside of an IC (1) with respect to the capacitance value and arrangement location of a bypass capacitor (4) is calculated on the basis of the impedance of current paths (P1, P2) passing via a bypass capacitor (4) at the outside of the IC (1) and the impedance of the inside of IC (1) when viewed from power supply terminals (2, 3) of the IC (1). The capacitance value and arrangement location of the bypass capacitor (4) are determined on the basis of the calculation result.
Claims16
A method for designing a bypass capacitor that is to be equipped to an IC, the method comprising:
- calculating noise current flowing outside of the IC for a capacitance value and arrangement location of the bypass capacitor on the basis of an impedance of a current path passing via the bypass capacitor outside of the IC and an impedance of an inside of the IC when viewed from IC terminals connected to the bypass capacitor;
- and
- determining the capacitance value and arrangement location of the bypass capacitor based upon the noise current.
Amount circuit designing system for performing a mount circuit design for a bypass capacitor to be mounted by an IC, the system comprising:
- an operating unit for calculating noise current flowing outside of the IC with respect to a capacitance value and an arrangement location of the bypass capacitor on the basis of an impedance of a current path passing via the bypass capacitor at the outside of the IC and an impedance of an inside of the IC when viewed from an IC terminal connected to the bypass capacitor.
A mount circuit designing program for executing a mount circuit designing program for a bypass capacitor equipped to an IC to be mounted, the mount circuit designing program when installed on and executed by an operating device resulting in the operating device:
- inputting data regarding an impedance of a current path passing via the bypass capacitor at an outside of the IC, and data regarding an impedance of an inside of the IC when viewed from an IC terminal connected to the bypass capacitor;
- and
- calculating noise current flowing to the outside of the IC with respect to the capacitance value and arrangement location of the bypass capacitor on the basis of the impedance data thus input.
Dependencies are inferred from the claim text.