Error correction coding apparatus and method
AssigneeSamsung Electronics Co., Ltd.
InventorsKi-hyun Kim, In-sik Park, Jae-seong Shim, Sung-hyu Han
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AssigneeSamsung Electronics Co., Ltd.
InventorsKi-hyun Kim, In-sik Park, Jae-seong Shim, Sung-hyu Han
Estimating the term…
An error correction coding apparatus includes a parity check matrix generation unit which generates a parity check matrix having a number of elements having a value of 1 in each row thereof, having a predetermined number of elements having a value of 1 in each column thereof, and having the other elements having a value of 0; a parity check matrix adjustment unit which receives the parity check matrix from the parity check matrix generation unit, searches the parity check matrix for a cycle forming group of four elements positioned at respective vertexes of a rectangle and having a value of 1, and when there is at least one cycle forming group, replaces the value of 1 of at least one element of the cycle forming group with the value 0 of another element, to output a adjusted parity check matrix without a cycle forming group therein; and an LDPC coding unit which receives the adjusted parity check matrix from the parity check matrix adjustment unit and receives an m-bit message word to perform LDPC coding.
An error correction coding apparatus comprising:
An error correction coding method comprising:
A computer readable medium encoded with processing instructions for performing an error correction coding method comprising:
An error correction coding apparatus comprising:
A computer readable storage medium encoded with processing instructions for performing an error correction coding method comprising:
Dependencies are inferred from the claim text.