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US 2004/0168015 A1Published application
Flash memory with RDRAM interface
AssigneeMicron Technology, Inc.
InventorsFrankie Fariborz Roohparvar, Kevin C. Widmer
Life of this patent
Estimating the term…
Abstract
A flash memory has been described that has an interface corresponding to a rambus dynamic random access memory (RDRAM). The memory samples commands and addresses on a rising edge of a clock signal. The read and write data are provided on both the rising edge and the falling edge of the clock signal.
Claims15
A method for reading a flash memory device, the method comprising:
- generating a clock signal;
- providing a flash memory device read command;
- providing a selected memory address of non-volatile memory cells;
- and
- detecting a plurality of data words in a rambus dynamic random access memory (RDRAM) compatible format, each data word being received on clock signal transitions, a first data word starting at the selected memory location and continuing for a programmed number of memory addresses in a programmed sequence.
2 more elements
A method for reading a flash memory device, the method comprising:
- reading first and second data words from non-volatile memory cells;
- outputting the first data word on a rising edge of a clock signal following a rambus dynamic random access memory (RDRAM) compatible format;
- and
- outputting the second data word on the falling edge of the clock signal following the RDRAM compatible format.
1 more element
A method for reading a non-volatile memory device that is coupled to a unified communication bus with other memory devices, the method comprising:
- receiving a clock signal;
- receiving a non-volatile memory device read command;
- receiving a selected memory address of non-volatile memory cells;
- receiving a data burst length;
- and
- outputting a data word in a rambus dynamic random access memory (RDRAM) compatible format.
3 more elements
Dependencies are inferred from the claim text.