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US 2004/0166826 A1Published application
Method of forming an RF detector and structure therefor
AssigneeSemiconductor Components Industries, LLC
InventorHassan Chaoui
Life of this patent
Estimating the term…
Abstract
An RF detector (15) is formed to compress the output voltage at two different rates depending on the value of the output voltage. Using two different rates of compression reduces saturation of the output voltage and reduces distortion. The RF detector (15) also provides temperature compensation in the output voltage to reduce output voltage variations due to temperature changes.
Claims20
A method of forming an RF detector comprising:
- forming a first transistor to receive an RF input signal and generate a first current that is representative of the RF input signal;
- forming a second transistor coupled to receive the first current and responsively form an intermediate voltage representative of the first current;
- and
- forming a third transistor coupled to receive the intermediate voltage and form an output voltage that varies with the RF input signal wherein the variation is at a first rate when the output voltage is less than a first output voltage value and varies at a second rate when the output voltage is not less than the first output voltage value.
1 more element
A method of detecting an RF signal comprising:
- receiving an RF input signal having a first signal component and a second signal component wherein the first signal component is less than a first frequency and the second signal component is not less than the first frequency;
- converting the RF input signal to a first voltage that varies at a frequency less than the first frequency wherein the first voltage is devoid of the second signal component;
- converting the first voltage to a first current that is proportional to the first voltage;
- and
- converting the first current to an output voltage at a first rate when the output voltage is less than a first output voltage value and at a second rate when the output voltage is not less than the first output voltage value.
2 more elements
An RF detector comprising:
- an output;
- a first transistor having a first current carrying electrode coupled to an input of the RF detector, a control electrode coupled to receive a bias voltage from a bias network, and a second current carrying electrode;
- a second transistor having a first current carrying electrode coupled to the second current carrying electrode of the first transistor, a control electrode coupled to the first current carrying electrode, and a second current carrying electrode coupled to a power input, the second transistor having a cut-off frequency that is less than a first value;
- a voltage compression circuit coupled to have a first impedance when a value of an output voltage is less than a first output voltage value and to switch the first impedance to a second impedance when the value of the output voltage is not less than the first output voltage value;
- a third transistor having a control electrode coupled to the control electrode of the second transistor, a first current carrying electrode coupled to a power input, and a second current carrying electrode coupled to the output of the RF detector and coupled to receive a bias current from the voltage compression circuit;
- and
- a temperature compensation circuit coupled to provide the voltage compression circuit a first bias voltage value that varies less than 0.50 dB over a temperature range of minus 35 degrees Celsius to 85 degrees Celsius.
4 more elements
Dependencies are inferred from the claim text.