Semiconductor device with dual gate oxides

A method for making a semiconductor device having a first active region and a second active region, the first active region using a first operational voltage and the second active region using a second operational voltage that is different from the first voltage, the method comprising:

• providing first, second, and third isolation structures defining the first and second active regions on a substrate;
• providing a separation structure between the second and third isolation structures, the second and third isolation structures and the separation structure being provided between the first and second active regions;
• forming a nitride layer overlying the first and second active regions of the substrate;
• forming an oxide layer overlying the nitride layer;
• removing a first portion of the oxide layer overlying the first active region to expose a first portion of the nitride layer;
• removing the exposed first portion of the nitride layer while leaving a second portion of the nitride layer that is overlying the second active region intact;
• thereafter, forming a first gate oxide having a first thickness on the first active region and being configured to handle the first voltage;
• and
• thereafter, forming a second gate oxide having a second thickness on the second active region and being configured to handle the second voltage, the second thickness being different than the first thickness.

A method for making a semiconductor device having a first active region and a second active region, the first active region using a first operational voltage and the second active region using a second operational voltage that is different from the first voltage, the method comprising:

• providing first, second, and third shallow trench isolation (“STI”) structures defining the first and second active regions on a silicon substrate;
• providing a guard ring between the second and third STI structures, the guard ring enclosing the first active region;
• forming a nitride layer overlying the first and second active regions;
• forming an oxide layer overlying the nitride layer;
• removing a first portion of the oxide layer overlying the first active region to expose a first portion of the nitride layer;
• removing the exposed first portion of the nitride layer using a wet etch method while leaving a second portion of the nitride layer overlying the second active region intact;
• thereafter, forming a first gate oxide having a first thickness on the first active region, the first gate oxide having a first edge facing the first isolation structure and a second edge facing the second isolation structure, the first edge being separated from the first isolation structure by a first distance and the second edge being separated from the second isolation structure by a second distance;
• and
• thereafter, forming a second gate oxide having a second thickness on the second active region, the second thickness being different than the first thickness.