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US 2004/0166647 A1Published application
Atomic layer deposition of capacitor dielectric
OwnerLingyi A. Zheng, Er-Xuan Ping +2inventors
InventorsLingyi A. Zheng, Er-Xuan Ping, Lyle Breiner, Trung T. Doan
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Abstract
A capacitor structure is formed over a semiconductor substrate by atomic layer deposition to achieve uniform thickness in memory cell dielectric layers, particularly where the dielectric layer is formed in a container-type capacitor structure. In accordance with several embodiments of the present invention, a process for forming a capacitor structure over a semiconductor substrate is provided. Other embodiments of the present invention relate to processes for forming memory cell capacitor structures, memory cells, and memory cell arrays. Capacitor structures, memory cells, and memory cell arrays are also provided.
Claims11
A process for forming a capacitor structure comprising:
- forming a BPSG insulating layer over a semiconductor substrate;
- forming a container in said insulating layer;
- forming an HSG polysilicon lower electrode layer along an inner surface of said container;
- forming a silicon nitride dielectric layer characterized by a given degree of uniformity over said HSG polysilicon lower electrode layer and an upper surface of said BPSG insulating layer through an atomic layer deposition process where a silicon-containing precursor is chemisorbed over a surface of said HSG lower electrode layer and a nitrogen-containing precursor is reacted with said chemisorbed silicon-containing precursor to form said silicon nitride dielectric layer such that
- said given degree of uniformity exceeds a degree of uniformity attributable to LPCVD nucleation incubation of silicon nitride over HSG polysilicon and BPSG, and
- said thickness of said silicon nitride dielectric layer is sufficient to prevent oxidation punch-through from a reoxidized layer formed over said dielectric layer to said HSG polysilicon lower electrode layer;
- and
- forming an upper electrode layer over said reoxidized layer.
5 more elements
A process for forming a capacitor structure comprising:
- forming a BPSG insulating layer over a semiconductor substrate;
- forming a container in said insulating layer;
- forming an HSG polysilicon lower electrode layer along an inner surface of said container;
- forming a silicon nitride dielectric layer less than about 50 angstroms in thickness and characterized by a given degree of uiformity over said HSG polysilicon lower electrode layer and an upper surface of said BPSG insulating layer through an atomic layer deposition process where a silicon-containing precursor is chemisorbed over a surface of said HSG lower electrode layer and a nitrogen-containing precursor is reacted with said chemisorbed silicon-containing precursor to form said silicon nitride dielectric layer such that
- said given degree of uniformity exceeds a degree of uniformity attributable to LPCVD nucleation incubation of less than 50 angstrom thick silicon nitride over HSG polysilicon and BPSG, and
- said thickness of said silicon nitride dielectric layer is sufficient to prevent oxidation punch-through from a reoxidized layer formed over said dielectric layer to said HSG polysilicon lower electrode layer;
- and
- forming an upper electrode layer over said reoxidized layer.
5 more elements
A process for forming a capacitor structure comprising:
- forming an insulating layer over a semiconductor substrate;
- forming a container in said insulating layer;
- forming a lower electrode layer along an inner surface of said container;
- forming a dielectric layer characterized by a given degree of uiformity over said lower electrode layer and an upper surface of said insulating layer through an atomic layer deposition process where a silicon-containing precursor is chemisorbed over a surface of said lower electrode layer and a nitrogen-containing precursor is reacted with said chemisorbed silicon-containing precursor to form said dielectric layer such that
- said given degree of uniformity exceeds a degree of uniformity attributable to LPCVD nucleation incubation of a dielectric layer over an electrode layer and an insulating layer, and
- said thickness of said dielectric layer is sufficient to prevent oxidation punch-through from a reoxidized layer formed over said dielectric layer to said lower electrode layer;
- and
- forming an upper electrode layer over said reoxidized layer.
5 more elements
A process for forming a memory cell comprising:
- forming a semiconductor structure defining a transistor and a pair of transistor node locations in a semiconductor substrate;
- forming a BPSG insulating layer over said semiconductor substrate;
- forming a container in said insulating layer over one of said transistor node locations;
- forming an HSG polysilicon lower electrode layer along an inner surface of said container;
- forming a silicon nitride dielectric layer characterized by a given degree of uniformity over said HSG polysilicon lower electrode layer and an upper surface of said BPSG insulating layer through an atomic layer deposition process where a silicon-containing precursor is chemisorbed over a surface of said HSG lower electrode layer and a nitrogen-containing precursor is reacted with said chemisorbed silicon-containing precursor to form said silicon nitride dielectric layer such that
- said given degree of uniformity exceeds a degree of uniformity attributable to LPCVD nucleation incubation of silicon nitride over HSG polysilicon and BPSG, and
- said thickness of said silicon nitride dielectric layer is sufficient to prevent oxidation punch-through from a reoxidized layer formed over said dielectric layer to said HSG polysilicon lower electrode layer;
- and
- forming an upper electrode layer over said reoxidized layer.
6 more elements
A process for forming a memory cell comprising:
- forming a semiconductor structure defining a transistor and a pair of transistor node locations in a semiconductor substrate;
- forming a BPSG insulating layer over said semiconductor substrate;
- forming a container in said insulating layer over one of said transistor node locations;
- forming an HSG polysilicon lower electrode layer along an inner surface of said container;
- forming a silicon nitride dielectric layer less than about 50 angstroms in thickness and characterized by a given degree of uiformity over said HSG polysilicon lower electrode layer and an upper surface of said BPSG insulating layer through an atomic layer deposition process where a silicon-containing precursor is chemisorbed over a surface of said HSG lower electrode layer and a nitrogen-containing precursor is reacted with said chemisorbed silicon-containing precursor to form said silicon nitride dielectric layer such that
- said given degree of uniformity exceeds a degree of uniformity attributable to LPCVD nucleation incubation of less than 50 angstrom thick silicon nitride over HSG polysilicon and BPSG, and
- said thickness of said silicon nitride dielectric layer is sufficient to prevent oxidation punch-through from a reoxidized layer formed over said dielectric layer to said HSG polysilicon lower electrode layer;
- and
- forming an upper electrode layer over said reoxidized layer.
6 more elements
A process for forming a memory cell comprising:
- forming a semiconductor structure defining a transistor and a pair of transistor node locations in a semiconductor substrate;
- forming an insulating layer over said semiconductor substrate;
- forming a container in said insulating layer over one of said transistor node locations;
- forming a lower electrode layer along an inner surface of said container;
- forming a dielectric layer characterized by a given degree of uiformity over said lower electrode layer and an upper surface of said insulating layer through an atomic layer deposition process where a silicon-containing precursor is chemisorbed over a surface of said lower electrode layer and a nitrogen-containing precursor is reacted with said chemisorbed silicon-containing precursor to form said dielectric layer such that
- said given degree of uniformity exceeds a degree of uniformity attributable to LPCVD nucleation incubation of a dielectric layer over an electrode layer and an insulating layer, and
- said thickness of said dielectric layer is sufficient to prevent oxidation punch-through from a reoxidized layer formed over said dielectric layer to said lower electrode layer;
- and
- forming an upper electrode layer over said reoxidized layer.
6 more elements
Dependencies are inferred from the claim text.