Semiconductor nano-rod devices
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHao-Yu Chen, Yee-Chia Yeo, Fu-Liang Yang, Chenming Hu
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Abstract
In a method of manufacturing a semiconductor device, a semiconductor layer is patterned to form a source region, a channel region, and a drain region in the semiconductor layer. The channel region extends between the source region and the drain region. Corners of the channel region are rounded by annealing the channel region to form a nano-rod structure. Part of the nano-rod structure is then used as a gate channel. Preferably, a gate dielectric and a gate electrode both wrap around the nano-rod structure, with the gate dielectric being between the nano-rod structure and the gate electrode, to form a transistor device.
Claims22
A method of manufacturing a semiconductor device, comprising:
- providing a semiconductor structure comprising a semiconductor layer overlying an insulating material;
- patterning the semiconductor layer to form a source region, a channel region, and a drain region in the semiconductor layer, wherein the channel region extends between the source region and the drain region;
- and
- rounding corners of the channel region by annealing.
A method of manufacturing a semiconductor nano-rod device, comprising:
- patterning a semiconductor layer to form a source region, a channel region, and a drain region in the semiconductor layer, wherein the channel region extends between the source region and the drain region;
- rounding corners of the channel region by annealing the channel region;
- etching the insulating layer using an etch chemistry selective against etching the semiconductor layer, wherein the etching is performed long enough so that at least a segment of the rounded channel region is suspended above a proximate portion of the insulating layer;
- forming a gate dielectric material on a surface of and about the rounded channel region;
- forming a gate electrode material on the gate dielectric and about the rounded channel region;
- and
- patterning the gate electrode material to form a gate electrode, the gate electrode comprising a gate wrap region that wraps around the rounded channel region and a gate contact region extending therefrom.
A semiconductor device comprising:
- an insulating layer over an underlying layer;
- a layer of semiconductor material over the insulating layer, the semiconductor layer having a source region, a drain region, and an annealed nano-rod structure extending between the source and drain regions;
- a gate dielectric formed on the surface of at least a segment of the nano-rod structure;
- and
- a gate electrode formed on the surface of the gate dielectric at the segment.
A semiconductor device comprising a plurality of transistors, wherein each of the plurality of transistors comprises:
- an annealed semiconductor layer having a source region, a drain region, and a channel region formed therein, the channel region extending between the source region and the drain region, the channel region having a substantially circular cross-section shape,
- a gate dielectric layer around a segment of the channel region, and
- a gate electrode having a gate wrap region that wraps around the segment of the channel region and a gate contact region extending therefrom, wherein the gate dielectric layer is between the segment of the channel region and the gate wrap region of the gate electrode.
Dependencies are inferred from the claim text.