Method and structure to reduce CMOS inter-well leakage
AssigneeInternational Business Machines Corporation
InventorsLyndon R. Logan, James A. Slinkman
Life of this patent
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Abstract
A method of forming a semiconductor device with improved leakage control, includes: providing a semiconductor substrate; forming a trench in the substrate; forming a leakage stop implant in the substrate under the bottom of the trench and under and aligned to a sidewall of the trench; filling the trench with an insulator; and forming an N-well (or a P-well) in the substrate adjacent to and in contact with an opposite sidewall of the trench, the N-well (or the N-well) extending under the trench and forming an upper portion of an isolation junction with the leakage stop implant, the upper portion of the isolation junction located entirely under the trench. The leakage control implant is self-aligned to the trench sidewalls.
Claims60
A method of forming a semiconductor device with improved leakage control, comprising:
- providing a semiconductor substrate having a top surface;
- forming a trench in said substrate, said trench having a bottom, a first sidewall and an opposite second sidewall;
- forming a leakage stop implant in said substrate under the bottom of said trench and under and aligned to said second sidewall;
- filling said trench with an insulator;
- and
- forming an N-well in said substrate adjacent to and in contact with said first sidewall, said N-well extending under said trench and forming an upper portion of an isolation junction with said leakage stop implant, said upper portion of said isolation junction located entirely under said trench.
A method of forming a semiconductor device with improved leakage control, comprising:
- providing a P doped semiconductor substrate having a top surface;
- forming a trench in said substrate, said trench having a bottom, a first sidewall and an opposite second sidewall;
- forming a conformal modulating layer on the top surface of said substrate and on the bottom and first and second sidewalls of said trench, said modulating layer having a outer surface;
- forming a leakage stop implant in said substrate under the bottom of said trench and under and aligned to the outer surface of said modulating layer on said second sidewall;
- filling said trench with an insulator;
- and
- forming an N-well in said substrate adjacent to and in contact with said first sidewall, said N-well extending under said trench and forming an upper portion of an isolation junction with said leakage stop implant, said upper portion of said isolation junction located entirely under said trench.
A semiconductor device with improved leakage control, comprising:
- a P doped semiconductor substrate having a top surface;
- a STI in said substrate, said STI having a bottom, a first sidewall and an opposite second sidewall;
- a leakage stop implant in said substrate under the bottom of said STI and under and aligned to said second sidewall;
- and
- an N-well in said substrate adjacent to and in contact with said first sidewall, said N-well extending under said STI and forming an upper portion of an isolation junction with said leakage stop implant, said upper portion of said isolation junction located entirely under said STI.
A method of forming a semiconductor device with improved leakage control, comprising:
- providing a semiconductor substrate having a top surface;
- forming a trench in said substrate, said trench having a bottom, a first sidewall and an opposite second sidewall;
- forming a leakage stop implant in said substrate under the bottom of said trench and under and aligned to said second sidewall;
- filling said trench with an insulator;
- and
- forming a P-well in said substrate adjacent to and in contact with said first sidewall, said P-well extending under said trench and forming an upper portion of an isolation junction with said leakage stop implant, said upper portion of said isolation junction located entirely under said trench.
A method of forming a semiconductor device with improved leakage control, comprising:
- providing an N doped semiconductor substrate having a top surface;
- forming a trench in said substrate, said trench having a bottom, a first sidewall and an opposite second sidewall;
- forming a conformal modulating layer on the top surface of said substrate and on the bottom and first and second sidewalls of said trench, said modulating layer having a outer surface;
- forming a leakage stop implant in said substrate under the bottom of said trench and under and aligned to the outer surface of said modulating layer on said second sidewall;
- filling said trench with an insulator;
- and
- forming a P-well in said substrate adjacent to and in contact with said first sidewall, said P-well extending under said trench and forming an upper portion of an isolation junction with said leakage stop implant, said upper portion of said isolation junction located entirely under said trench.
A semiconductor device with improved leakage control, comprising:
- an N doped semiconductor substrate having a top surface;
- a STI in said substrate, said STI having a bottom, a first sidewall and an opposite second sidewall;
- a leakage stop implant in said substrate under the bottom of said STI and under and aligned to said second sidewall;
- and
- a P-well in said substrate adjacent to and in contact with said first sidewall, said P-well extending under said STI and forming an upper portion of an isolation junction with said leakage stop implant, said upper portion of said isolation junction located entirely under said STI.
Dependencies are inferred from the claim text.