Nonvolatile semiconductor memory device

A nonvolatile semiconductor memory device, comprising:

• a memory cell, having a well of a first conductivity type formed on a main surface of a semiconductor substrate, a semiconductor source/drain layer region, formed along a first direction within said well, a first gate formed on said semiconductor substrate through a first insulator film, and a second gate formed on said first gate through a second insulator film;
• a word line control circuit to drive a word line connected to said second gate;
• a program data holding circuit to hold program data;
• a programming voltage generator circuit to apply a programming voltage onto a bit line, which is connected to a drain of said semiconductor source/drain layer region;
• and
• a discrimination circuit to verify said program data,
• wherein programming of data to said memory cell is conducted by applying positive independent voltages to said second gate and the drain, respectively, while injecting hot electrons generated in a channel portion in a vicinity of the drain when 0V is applied to said well of the first conductivity type and to a source of said semiconductor source/drain layer region, thereby to increase a threshold voltage of said memory cell, and the verification of said programmed data is conducted by applying a verify voltage to said second gate, while applying a positive voltage to the drain and 0V to said well of the first conductivity type and to the source, thereby verifying whether the positive voltage applied to the drain is maintained as it is or comes down to 0V, depending upon a height of the threshold voltage of said memory cell, by means of said discrimination circuit.