Analog to digital converter selecting reference voltages in accordance with feedback from prior stages
AssigneeOki Electric Industry Co., Ltd.
InventorTakashi Konno
Life of this patent
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Abstract
An A/D converter includes first to Nth stages of A/D conversion units, which are connected in series, each A/D conversion unit converting an analog input signal into a digital output signal. Each of the A/D conversion units includes a) a sample-and-hold circuit, which holds an analog input signal; b) a selector which selects one from a plurality of reference voltage signals in accordance with a digital output signal outputted from the one stage preceding A/D conversion unit; and c) a comparator which compares an output signal supplied from the sample-and-hold circuit with the reference voltage signal selected by the selector.
Claims24
An A/D converter comprising:
- first to Nth stages of A/D conversion units, which are connected in series, each A/D conversion unit converting an analog input signal into a digital output signal;
- each of the A/D conversion units comprises:
- a) a sample-and-hold circuit, which holds an analog input signal;
- b) a selector which selects one from a plurality of reference voltage signals in accordance with a digital output signal outputted from the one stage preceding A/D conversion unit;
- and
- c) a comparator which compares an output signal supplied from the sample-and-hold circuit with the reference voltage signal selected by the selector.
An A/D converter comprising:
- first to Nth stages of A/D conversion units, which are connected in series, each A/D conversion unit converting an analog input signal into a digital output signal in synchronization with a clock signal, wherein
- each of the A/D conversion units comprises:
- a) a sample-and-hold circuit, which holds an analog input signal;
- b) a selector which selects one from a plurality of reference voltage signals in accordance with a digital output signal outputted from the one stage preceding A/D conversion unit;
- and
- c) a comparator which compares an output signal supplied from the sample-and-hold circuit with the reference voltage signal selected by the selector to generate a digital output signal thereof, wherein,
- an output signal of the comparator for the one stage preceding A/D conversion unit is supplied to the selector therein,
- even-numbered stages of A/D conversion units and odd-numbered stages of A/D conversion units operate in synchronization with clock signals having the opposite phases,
- ith stage of A/D conversion unit further comprises (N−i+1) pieces of flip-flop circuits to which an output signal of the comparator in the one stage preceding A/D conversion unit is supplied, and
- in ith stage of A/D conversion unit, the selector selects one reference voltage signal from 2i-1 pieces of reference voltage signals.
An A/D converter comprising:
- first to Nth stages of A/D conversion units, which are connected in series, each A/D conversion unit converting an analog input signal into a digital output signal in synchronization with a clock signal, wherein
- the first stage of A/D conversion unit is a flash A/D conversion unit of m-bit flash type, where “m” is smaller than “N”, in which the flash A/D conversion unit comprises a m-bit flash A/D conversion circuit;
- a sample and hold circuit which holds an analog input signal;
- and m*(N−m) pieces of flip-flop circuits, in which each of serially connected (N−m) pieces of flip-flop circuits form a line so that “m”lines of (N−m) flip-flop circuits are connected in parallel to output terminals of the m-bit flash A/D conversion circuit,
- each of the second to Nth stages of A/D conversion units comprises:
- a) a sample-and-hold circuit, which holds an analog input signal;
- b) a selector which selects one from a plurality of reference voltage signals in accordance with a digital output signal outputted from the one stage preceding A/D conversion unit;
- and
- c) a comparator which compares an output signal supplied from the sample-and-hold circuit with the reference voltage signal selected by the selector to generate a digital output signal thereof, wherein,
- an output signal of the comparator for the one stage preceding A/D conversion unit is supplied to the selector therein,
- even-numbered stages of A/D conversion units and odd-numbered stages of A/D conversion units operate in synchronization with clock signals having the opposite phases,
- ith stage of A/D conversion unit further comprises (N−i+1) pieces of flip-flop circuits to which an output signal of the comparator in the one stage preceding A/D conversion unit is supplied, and
- in ith stage of A/D conversion unit, the selector selects one reference voltage signal from 2i-1 pieces of reference voltage signals.
Dependencies are inferred from the claim text.