Charge pump level converter (CPLC) for dual voltage system in very low power application
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorTsung-Hsin Yu
Life of this patent
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Abstract
Recent efforts are underway to develop LSI circuits that operate at power supply voltages of 1-V or lower. It is a desire that this low core voltage circuits interface to 3.3-V I/O supply. A charge pump level converter for dual power supply application is proposed using low power and high speed interface to higher I/O supply. This circuit does not consume DC power it is suitable for low power and high speed interface and can be implemented using complementary metal-oxide-semiconductor (CMOS) fabrication processes.
Claims26
A complementary metal oxide-semiconductor(CMOS) charge pump level converter circuit having a low core differential input signal that is converted to a high differential output voltage, the charge pump level converter comprising:
- a first charge pump level converter circuit used to generate an elevated output signal in response to the input signal;
- a second charge pump level converter circuit used to generate an elevated output signal in response to an input signal of the same amplitude as the said first input signal but inverted with respect to the first said input signal;
- a differential cascode voltage switch circuit whose inputs are coupled to said first and second voltage elevated output signals in order to generate a high differential output voltage, wherein the first and second elevated output signals comprises:
- a first precharge transistor coupled between a first power supply and said first precharge node and having an input coupled to said first power supply;
- a second precharge transistor coupled between a first power supply and said second precharge node and having an input coupled to said first power supply;
- a first charge transfer transistor serving as a capacitor having a first terminal coupled to the first precharge node and a second terminal coupled to the first input signal;
- and
- a second charge transfer transistor serving as a capacitor having a first terminal coupled to the second precharge node and a second terminal coupled to the second input signal.
A method of converting a low swing differential input voltage to a high-speed I/O differential interface, comprising:
- elevating a first input signal using a first charge pump converter circuit to generate a first elevated signal;
- elevating a second input signal using a second charge pump converter circuit to generate an elevated signal in response to an input signal of the same amplitude as the first input signal but inverted with respect to the first said input signal;
- and
- a differential cascode voltage switch circuit whose inputs are coupled to said first and second elevated output signals in order to generate a high differential output voltage.
Dependencies are inferred from the claim text.