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US 2004/0164396 A1Published application
Interconnect substrate and method of manufacture thereof, electronic component and method of manufacturing thereof, circuit board and electronic instrument
AssigneeSeiko Epson Corporation
InventorNobuaki Hashimoto
Life of this patent
Estimating the term…
Abstract
An interconnect substrate comprising: a first substrate (10) on which a first interconnect pattern (12) is formed, having a mounting region (14) for an electronic chip; and a second substrate (20) on which a second interconnect pattern (22) electrically connected to the first interconnect pattern (12) is formed, having a region (26) to which at least a part of the first substrate (10) is adhered, and a mounting region (24) for an electronic chip.
Claims20
An interconnect substrate wherein:
- a first substrate on which a first interconnect pattern is formed and a second substrate on which a second interconnect pattern is formed are disposed in superimposition;
- at least one of the first interconnect pattern and the second interconnect pattern has a mounting region for an electronic chip;
- and
- the first interconnect pattern and the second interconnect pattern are electrically connected.
1 more element
An electronic component comprising:
- a first substrate on which a first interconnect pattern is formed;
- a second substrate having a region which at least a part of the first substrate is disposed opposing, on which a second interconnect pattern is formed electrically connected to the first interconnect pattern;
- and
- at least one electronic chip electrically connected to at least one of the first interconnect pattern and the second interconnect pattern.
1 more element
Dependencies are inferred from the claim text.