Stacked semiconductor module
AssigneeRambus Inc.
InventorsThomas F. Fox, Sayeh Khalili, Belgacem Haba, David Nguyen, Richard Warmke, Xingchao Yuan
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AssigneeRambus Inc.
InventorsThomas F. Fox, Sayeh Khalili, Belgacem Haba, David Nguyen, Richard Warmke, Xingchao Yuan
Estimating the term…
The semiconductor module is provided that includes a semiconductor housing and a plurality of integrated circuit dice positioned within the housing. The semiconductor module also includes a programmable memory device positioned within the housing and electrically coupled to the plurality of integrated circuit dice. The programmable memory device is programmable to identify the integrated circuit dice that meet a predetermined standard, such as an operating frequency requirement, or a core timing grade. Further, a method is provided for accessing a semiconductor module. The above mentioned housing is provided to enclose the plurality of integrated circuit dice and the programmable memory device. The integrated circuit dice of the plurality of integrated circuit dice that meet a predetermined standard are then identified. The programmable memory device is subsequently programmed to identify the selected integrated circuit dice.
A method of operation of a module that includes a plurality of integrated circuit dies and a programmable memory device disposed within a housing, wherein the method comprises:
A method of operation of a module that includes a plurality of integrated circuit dies and a programmable memory device disposed within a housing, wherein the method comprises:
A method of operation of a module that includes a plurality of integrated circuit dies and a programmable memory device disposed within a housing, wherein the method comprises:
A method of operation of a module that includes a plurality of integrated circuit dies and a programmable memory device disposed within a housing, wherein the method comprises:
A method of operation of a module that includes a plurality of integrated circuit memory devices and a programmable memory device disposed within a housing, wherein the method comprises:
A method of operation in a module that includes a plurality of integrated circuit memory devices and a programmable memory device disposed within a housing, wherein the method comprises:
A method of operation of a memory module that includes a plurality of integrated circuit dies and a programmable memory device disposed within a housing, wherein the method comprises storing in the programmable memory device a lowest core timing grade, of all core timing grades of the plurality of integrated circuit memory devices, as a maximum core timing grade for the memory module.
A method of operation of a memory module that includes a plurality of integrated circuit dies and a programmable memory device disposed within a housing, wherein the method comprises storing in the programmable memory device a lowest operating frequency, of all operating frequencies of the plurality of integrated circuit memory devices, as a maximum operating frequency for the memory module.
A semiconductor module, comprising:
Dependencies are inferred from the claim text.