Shallow trench isolation structure for strained Si on SiGe
OwnerSteven John Koester, Klaus Dietrich Beyer +3inventors
InventorsSteven John Koester, Klaus Dietrich Beyer, Michael John Hargrove, Kern Rim, Kevin Kok Chan
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Abstract
A structure, and a method for fabricating the structure, for the isolation of electronic devices is disclosed. The electronic devices are processed in substrates comprising a SiGe based layer underneath a strained Si layer. The isolation structure comprises a trench extending downward from the substrate top surface and penetrating into the SiGe based layer, forming a sidewall in the substrate. An epitaxial Si liner is selectively deposited onto the trench sidewall, and subsequently thermally oxidized. The trench is filled with a trench dielectric, which protrudes above the substrate top surface.
Claims30
A device structure, comprising:
- a substrate comprising a Siege based layer, said substrate having a top surface;
- a trench extending downward from said top surface penetrating into said Siege based layer, wherein said trench having a sidewall formed in said substrate;
- a Si liner covering said sidewall, wherein said Si liner covers a surface of said Siege based layer on said sidewall, and wherein said Si liner is a monocrystalline material in an epitaxial relationship with said sidewall;
- an insulator layer grown on said Si liner;
- and
- a trench dielectric, said trench dielectric filling said trench and protruding out of said trench to above said top surface.
A plurality of MOSFET devices fabricated on a top surface of a Substrate, wherein said top surface belongs to a tensilely strained Si layer, wherein said Si layer is in an epitaxial relationship with an underlying Siege based layer, and wherein said plurality of MOSFET devices comprise an isolation structure, said isolation structure comprising:
- a trench extending downward from said top surface penetrating into said Siege based layer, wherein said trench having a sidewall formed in said substrate;
- a Si liner covering said sidewall, wherein said Si liner covers a surface of said Siege based layer on said sidewall, and wherein said Si liner is a monocrystalline material in an epitaxial relationship with said sidewall;
- an insulator layer grown on said Si liner;
- and
- a trench dielectric, said trench dielectric filling said trench and protruding out of said trench to above said top surface.
A method for making a device structure, comprising the steps of:
- taking a substrate comprising a Siege based layer, said substrate having a top surface;
- overlaying said substrate with a capping dielectric layer;
- etching a trench, wherein said trench cutting through said capping dielectric layer and extending downward from said top surface and penetrating into said Siege based layer, and wherein said trench having an auxiliary sidewall formed in said capping dielectric layer and having a sidewall formed in said substrate;
- depositing by selective epitaxy a monocrystalline Si liner over said sidewall including a surface of said Siege based layer on said sidewall, and leaving said auxiliary sidewall void of said Si liner.
Dependencies are inferred from the claim text.