Semiconductor device and manufacturing method thereof
AssigneeSemiconductor Energy Laboratory Co., Ltd., a Japan corporation
InventorsShunpei Yamazaki, Hideomi Suzawa, Yoshihiro Kusuyama, Koji Ono, Jun Koyama
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Abstract
There are provided a structure of a semiconductor device in which low power consumption is realized even in a case where a size of a display region is increased to be a large size screen and a manufacturing method thereof. A gate electrode in a pixel portion is formed as a three layered structure of a material film containing mainly W, a material film containing mainly Al, and a material film containing mainly Ti to reduce a wiring resistance. A wiring is etched using an IPC etching apparatus. The gate electrode has a taper shape and the width of a region which becomes the taper shape is set to be 1 μm or more.
Claims21
A semiconductor device comprising a plurality of TFTs, each of TFTs comprising:
- a semiconductor layer formed on an insulating surface;
- an insulating film formed on the semiconductor layer;
- and
- a gate electrode formed on the insulating film,
- wherein the semiconductor device comprising:
- a pixel portion comprising a first n-channel TFT having a source wiring made of the same material as the gate electrode;
- a driver circuit including a circuit comprising a second n-channel TFT and a third n-channel TFT;
- and
- a terminal portion made of the same material as the gate electrode.
A semiconductor device comprising a plurality of TFTs, each of TFTs comprising:
- a semiconductor layer formed on an insulating surface;
- an insulating film formed on the semiconductor layer;
- and
- a gate electrode formed on the insulating film, the gate electrode having a three-layer laminate structure,
- wherein said plurality of TFTs have the same conductivity type.
A method of manufacturing a semiconductor device comprising the steps of:
- forming a semiconductor layer on an insulating surface;
- forming a first insulating film on the semiconductor layer;
- forming a gate electrode, a source wiring of a pixel portion, and an electrode of a terminal portion on the first insulating film;
- adding an impurity element for providing an n-type to the semiconductor layer using the gate electrode as a mask to form an n-type impurity region;
- etching the gate electrode to form a taper portion;
- forming a second insulating film which covers the source wiring of the pixel portion and the terminal portion;
- and
- forming a gate wiring and a source wiring of the driver circuit on the second insulating film.
Dependencies are inferred from the claim text.