System and method for reducing trapped charge effects in a CMOS photodetector
AssigneeAgilent Technologies, Inc.
InventorRichard L. Baer
Life of this patent
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Abstract
A system and method for reducing image lag in a complementary metal oxide semiconductor (CMOS) photodetector is disclosed. In one embodiment, the invention is a a method for reducing image lag in an array of complementary metal oxide semiconductor (CMOS) photodetectors by forward biasing the photodetectors during a first time period to charge charge traps in the photodetectors, and reverse biasing the photodetectors during a second time period to remove charge from the photodetectors except the charge trapped in the charge traps.
Claims16
A system for reducing illumination-dependent trapped charge effects in a complementary metal oxide semiconductor (CMOS) photodetector, the system comprising:
- a negative-polarity voltage source connected to the photodetector via a first switch operable during a first time period to forward-bias the photodetector, the forward-biasing charging charge traps in the photodetector;
- and
- a positive-polarity voltage source connected to the photodetector via a second switch operable during a second time period to reverse bias the photodetector, the reverse-biasing removing charge from the photodetector except the charge trapped in the charge traps.
A system for reducing illumination-dependent trapped charge effects in a complementary metal oxide semiconductor (CMOS) photodetector, the system comprising:
- means for forward biasing the photodetector during a first time period to charge charge traps in the photodetector;
- and
- means for reverse biasing the photodetector during a second time period to remove charge from the photodetector except the charge trapped in the charge traps.
A method for reducing illumination-dependent trapped charge effects in a complementary metal oxide semiconductor (CMOS) photodetector, comprising:
- forward biasing the photodetector during a first time period to charge charge traps in the photodetector;
- and
- reverse biasing the photodetector during a second time period to remove charge from the photodetector except the charge trapped by the charge traps.
A method for reducing image lag in an array of complementary metal oxide semiconductor (CMOS) photodetectors, the method comprising:
- forward biasing the photodetectors during a first time period to charge charge traps in the photodetectors;
- and
- reverse biasing the photodetectors during a second time period to remove charge from the photodetectors except the charge trapped in the charge traps.
An image sensor having reduced image lag, the image sensor comprising:
- first traces connectable to receive a positive-polarity voltage;
- and
- a two-dimensional array of picture elements each connected to at least one of the first traces, each of the picture elements comprising a photodetector;
- a first switch array operable during a first time period to forward bias the photodetectors, the forward biasing charging charge traps in the photodetectors;
- and
- a second switch array operable during a second time period to connect the photodetectors to the first traces during the second time period to reverse bias the photodetectors, the reverse biasing removing charge from the photodetectors except the charge trapped in the charge traps.
Dependencies are inferred from the claim text.