Advanced recessed gate transistor and a method of forming the same
AssigneeAdvanced Micro Devices, Inc.
InventorsChristian Krueger, Thomas Feudel, Volker Grimm
Life of this patent
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Abstract
In manufacturing a recessed gate transistor, a channel implantation and a source/drain implantation are performed by means of a single implantation mask prior to the formation of a gate opening. Thereafter, the gate opening is formed to a depth that extends substantially to the channel implant so that raised drain and source regions are created which are substantially even with the gate electrode formed in the gate opening. Consequently, expensive and complex epitaxial growth steps can be avoided.
Claims40
A method of forming a recessed gate transistor, the method comprising:
- forming a resist mask over a substrate, said resist mask exposing an active region formed in said substrate;
- implanting a first dopant species into said active region to a first depth;
- implanting a second dopant species into said active region to a second depth that is less than said first depth;
- and
- forming a gate opening in said active region, wherein a depth of said gate opening substantially corresponds to said first depth.
A method of forming a recessed gate transistor, the method comprising:
- forming a gate opening in an active region formed in a substrate and having a first dopant species provided up to a first depth, and a second dopant species provided up to a second depth that is less than said first depth, wherein a depth of said gate opening extends substantially to said first depth;
- forming a gate electrode structure in said gate opening;
- and
- annealing said substrate to form source/drain regions and extension regions by diffusing said first dopant species.
A method of forming shallow source/drain extension regions in a recessed gate transistor, the method comprising:
- implanting a first dopant species with a first implantation energy into an active region formed in a substrate;
- implanting a second dopant species with a second implantation energy into said active region;
- forming a recessed gate electrode structure in said active region;
- and
- forming source/drain extension regions adjacent to said gate electrode structure by annealing said substrate.
A recessed gate transistor comprising:
- a gate electrode structure having an upper surface portion;
- and
- a drain region and a source region each having an upper surface portion, wherein the upper surface portion of said gate electrode is substantially even with the upper surface portion of said source and drain regions.
Dependencies are inferred from the claim text.