# US 2004/0113698 A1 · Signal amplifier using a doherty amplifier > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2004/0113698 A1 - Document ID: US20040113698A1 - Status: Published application - Kind: A1 - Application number: 10/618,772 - Filed: 2003-07-15 - Published: 2004-06-17 - Earliest claimed: 2002-11-18 - Assignees: Postech Foundation - Inventors: Bumman Kim; Youngoo Yang - Web page: https://patentgrep.com/patent/US20040113698A1 ## CPC - H03F 1/0288: {using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers} - H03F 3/602: {Combinations of several amplifiers} - H03F: AMPLIFIERS ## Abstract A signal amplifier includes a splitter for splitting an input signal into first and second signals, first and second bias control networks for generating a base bias signal for a Doherty amplifier in accordance with a power level of the input signal, a carrier amplifier for amplifying the first input signal, a peaking amplifier for amplifying the second input signal and a Doherty output network for combining the amplified signals. Through a simplified transformation of characteristic impedances in the Doherty output network, minimization of circuitry including the signal amplifier is obtained. Further, by controlling the Doherty amplifier in accordance with the power level of the input signal, both high efficiency and high linearity of the signal amplifier are achieved. ## Claims ### Claim 1 A signal amplifier comprising: a splitter for splitting an input signal into two signals to be transmitted respectively through a first and a second transmission paths; a first and a second bias control networks for generating base bias signals corresponding to a power level of the input signal by alternating their operation modes, wherein the power level of the input signal lower than a predetermined threshold level is associated with a low input power drive mode and the power level of the input signal higher than the predetermined threshold level is associated with a high input power drive mode of the control networks; a Doherty amplifier including a carrier amplifier for amplifying the signal transmitted through the first transmission path and a peaking amplifier for amplifying the signal transmitted through the second transmission path; and a Doherty output network for matching and outputting the signals amplified at the carrier amplifier and the peaking amplifier. ### Claim 2 (depends on 1) The signal amplifier of claim 1, wherein the carrier amplifier reduces idle current in the low input power drive mode and functions as a class AB amplifier in the high input power drive mode in accordance with the bias signal transmitted from the first bias control network; and the peaking amplifier is turned off in the low input power drive mode and functions as a class AB amplifier in the high input power drive mode in accordance with the bias signal transmitted from the second bias control network. ### Claim 3 (depends on 1) The signal amplifier of claim 1, wherein the first bias control network includes a VcontC pin for receiving different control voltages depending on the power level of the input signal and a VrefC pin for transmitting the different base bias signal to the carrier amplifier in accordance with the control voltage fed to the VcontC pin; and the second bias control network includes a VcontP pin for receiving different control voltages depending on the power level of the input signal and a VrefP pin for transmitting the different base bias signal to the peaking amplifier in accordance with the control voltage fed to the VcontP pin. ### Claim 4 (depends on 3) The signal amplifier of claim 3, wherein the control voltages fed to the VcontC pin is equal to that of the VcontP pin. ### Claim 5 (depends on 4) The signal amplifier of claim 4, wherein the VcontC pin and the VcontP pin are fed with about 2˜3 V in the low input power drive mode and about 0 V in the high input power drive mode. ### Claim 6 (depends on 1) The signal amplifier of claim 1, further comprising an attenuator for compensating a gain difference between the first and the second transmission paths in the high input power drive mode, which is located at one of input ends of the carrier amplifier and the peaking amplifier. ### Claim 7 (depends on 6) The signal amplifier of claim 6, wherein the attenuator is implemented by using passive elements or variable gain amplifiers (VGAs). ### Claim 8 (depends on 1) The signal amplifier of claim 1, further comprising a first transmission line for compensating a delay and a phase differences between the first and the second transmission paths. ### Claim 9 (depends on 8) The signal amplifier of claim 8, wherein the first transmission line is implemented by using lumped elements. ### Claim 10 (depends on 1) The signal amplifier of claim 1, wherein the Doherty output network includes: a second transmission line having characteristic impedance Roc and phase Θc, which is arranged at an output end of the carrier amplifier; a third transmission line having characteristic impedance Rop and phase Θp, which is arranged at an output end of the peaking amplifier; and a fourth transmission line having characteristic impedance Roc and phase 90°, which is coupled with the second transmission line. ### Claim 11 The signal amplifier 10, wherein the second, the third and the fourth transmission lines are implemented by using lumped elements. ### Claim 12 (depends on 10) The signal amplifier of claim 10, wherein the characteristic impedance Rop is adjusted in accordance with the formula of Rop=50·(1+α), where α is a size ratio of the peaking amplifier to the carrier amplifier. ### Claim 13 (depends on 10) The signal amplifier of claim 10, wherein the characteristic impedance Roc is adjusted in accordance with the formula of 2 R ⁢ ⁢ o ⁢ ⁢ c = 50 · 1 + α α , where α is a size ratio of the peaking amplifier to the carrier amplifier.