Microcomputer and test method therefore
AssigneeOki Electric Industry Co., Ltd.
InventorMitsuhiro Watanabe
Life of this patent
Estimating the term…
Abstract
When a test mode signal is rendered active by a signal given from an external terminal, a CPU reads and runs various self-testing programs stored in a ROM. When any of the test programs comes to a process of testing a security circuit, a security test signal is rendered active and when a predetermined address is accessed then, a selector is switched to a register side by the output signal of an AND circuit of a test circuit. An illegitimate instruction, for example, is set in the register and is given to the CPU. Whether the security circuit has failure is determined by checking if an illegitimate access detection signal is output when the CPU executes the illegitimate instruction.
Claims4
A microcomputer comprising:
- a first memory where a normal-operation program is stored;
- a second memory where a functional test program stored;
- a test mode detection circuit which monitors a signal supplied through an external terminal and detects if a test mode is designated;
- a central processing unit (CPU) which accesses said first memory and runs said normal-operation program when said test mode is not designated, and accesses said second memory and runs said functional test program when said test mode is designated;
- a memory management unit which monitors an access address and data with respect to said first and second memories and causes said CPU to execute a specific operation when there has been an unauthorized illegitimate access;
- and
- a test circuit which gives a preset specific instruction to said CPU when, in said test mode, a security test signal has been output from said CPU and a specific memory area has been accessed.
A microcomputer comprising:
- a first memory where a normal-operation program is stored;
- a second memory where a functional test program stored;
- a test mode detection circuit which monitors a signal supplied through an external terminal and detects if a test mode is designated;
- a central processing unit (CPU) which accesses said first memory and runs said normal-operation program when said test mode is not designated, and accesses said second memory and runs said functional test program when said test mode is designated;
- a memory management unit which monitors an access address and data with respect to said first and second memories and causes said CPU to execute a specific operation when there has been an unauthorized illegitimate access;
- and
- an exception processing circuit, included in said CPU, for executing a predetermined exception process when said functional test program is executing a security test and said memory management unit has instructed execution of said specific operation.
A test method for a microcomputer having a memory for storing a program, a central processing unit (CPU) which runs said program stored in said memory and a memory management unit which monitors an access to said memory and outputs an interrupt signal to said CPU upon detection of an illegitimate access, said test method sequentially executing:
- a process of writing a jump instruction to jump to a second address in a first address in said memory;
- a process of setting access to said second address as an illegitimate access in said memory management unit;
- a process of jumping to said first address;
- and
- a process of determining if there is a failure depending on whether or not said memory management unit has output said interrupt signal as a result of executing said jump instruction written at said first address.
Dependencies are inferred from the claim text.