Memory device with power-saving mode
AssigneeComax Semiconductor Inc.
InventorsJang-Min Lin, Chung Chuan Wang
Life of this patent
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Abstract
A memory device with power-saving mode. A memory unit is coupled to an electronic device to access desired data according to an input signal, wherein the electronic device has an operating voltage and the memory unit comprises an input buffer, a decoder, a memory array, an output buffer and a DC voltage generator. A voltage detector is coupled to the electronic device to detect operating voltage. When operating voltage falls below a predetermined value, and outputs a disable signal to turn off the input buffer and the output buffer, or enters a power-saving mode to apply required voltage with low potential to the input buffer, the decoder, the memory array, and the output buffer, thereby saving power.
Claims18
A memory device with power-saving mode, comprising:
- a memory unit coupled to an electronic device to access desired data according to an input signal, wherein the electronic device has an operating voltage and the memory unit comprises:
- an input buffer for buffering the input signal;
- a decoder coupled to the input buffer to output a address signal and a command signal according to the input signal;
- a memory array coupled to the decoder to read or write the desired data according to the address signal and the command signal;
- an output buffer coupled to the memory array to buffer the desired data from the memory array;
- and
- a DC voltage generator for generating required voltage with high potential and required voltage with low potential to apply to the input buffer, the decoder, the memory array and the output buffer;
- and
- a voltage detector coupled to the electronic device to detect operating voltage, and outputting a disable signal to turn off the input buffer and the output buffer when operating voltage falls below a predetermined value.
An electronic device having a memory device with power-saving mode, comprising:
- a main body having an operating voltage and outputting a control signal to access desired data;
- and
- a memory device with power-saving mode, coupled to the electronic device, wherein the memory device comprises:
- an input buffer for buffering the control signal;
- a decoder coupled to the input buffer to output a address signal and a command signal according to the control signal;
- a memory array coupled to the decoder to read or write the desired data according to the address signal and the command signal;
- a DC voltage generator for generating required voltage with high potential and required voltage with low potential to apply to the input buffer, the decoder, the memory array and the output buffer;
- and
- a voltage detector coupled to the electronic device to detect operating voltage, outputting a disable signal to turn off the input buffer and the output buffer when operating voltage falls below a predetermined value.
Dependencies are inferred from the claim text.