Dynamic software accessibility to a microprocessor system with a high speed memory cloner

A data processing system, comprising:

• a processor chip with a processor and a memory cloner;
• a memory;
• a switch connecting said processor to said memory;
• and
• means associated with said processor chip for dynamically changing an operating mode of the processor between a virtual addressing mode and a real addressing mode.

A processor chip comprising:

• a processor;
• a memory cloner with a virtual to real address conversion logic and a translation look aside buffer (TLB);
• a plurality of address operations that each include a reserve bit that is set by software executing on the processor, wherein a value of the reserve bit is utilized by the processor to determine whether to execute the specific instructions as virtual address operation or a real address operation;
• and
• means for dynamically changing a value of said reserve bit to reflect one of said virtual address operation and said real address operation.

A data processing system, comprising:

• a processor chip with a processor and a memory cloner;
• a memory;
• a switch connecting said processor to said memory;
• and
• means for dynamically selecting an addressing mode for particular memory address instructions by setting a value of a reserve bit within said address instructions, wherein a first value indicates real addressing mode and a second value indicates virtual addressing mode, wherein said selecting means balances data operation performance against data protection.