US 2004/0111581 A1 · Imprecise cache line protection mechanism during a memory clone operation

Abstract

A method for avoiding livelock within a multiprocessor data processing system when there are multiple, concurrent clone operations to similar memory data locations within a data processing system. A set of tokens are defined within the memory cloner for use prior to conducting a clone operation on the fabric. The tokens include a source token and a destination token. The tokens are issued on the fabric by a memory cloner prior to initiating the data clone operation. The tokens discover the availability of a source address and a destination address required to complete the clone operation. Once the response to the destination address token indicates that the destination address is not currently being utilized by another memory cloner to conduct another data clone operation, the memory cloner may issue the commands to initiate the memory clone operation.

Claims17

Dependent claims

A multiprocessor data processing system comprising:

a first processor with a first memory cloner;
a second processor with a second memory cloner;
a memory subsystem;
means for interconnecting said first and second processors and said memory subsystem;
and
a plurality of token operations that are issued from a particular one of said first memory cloner and said second memory cloner prior to a data clone operation, wherein said token operations reserve a source address and a destination address for a data clone operation originating from the particular first or second memory cloner.

3 more elements

Dependencies are inferred from the claim text.

Imprecise cache line protection mechanism during a memory clone operation

Life of this patent

Imprecise cache line protection mechanism during a memory clone operation

Life of this patent

Abstract

Claims17