Apparatus and method for memory device block movement

An apparatus for memory device block movement comprising:

• means for decoding a block movement command carrying a start address, destination address and move length to generate a block movement signal;
• means for generating a first, second and third loading signal when the block movement signal is asserted;
• means for receiving the start address, destination address and move length when the first, second and third loading signal are asserted respectively;
• means for outputting the start address to the memory device to retrieve data of a buffer length at a location beginning from the start address in the memory device and transferring the data into a buffer during a read cycle;
• means for outputting the destination address to the memory device and transferring the data from the buffer into the memory device at a location beginning from the destination address during a write cycle;
• and
• means for subtracting the move length by the buffer length, and adding the buffer length to the start address and destination address.