High speed memory cloning facility via a source/destination switching mechanism

Abstract

Disclosed is a data processing system that completes a data clone operation by routing the directly from a source location within said memory subsystem to a destination location within said memory subsystem. The data is not routed through the processor that initiated the data clone operation. The various storage components of the memory subsystem are directly interconnected to each other via a switch. The switch provides a large bandwidth for routing data. When a data clone operation is issued by the processor on the fabric of the data processing system, the data read operation sent to said source address is modified to include the destination address in place of the processor address. The switch routes the data to the address provided within the data read operation. Thus, the switch automatically routes the data to the destination address rather than to the processor address.

Dependencies are inferred from the claim text.